Electronic Components Datasheet Search |
|
VSC8140TW Datasheet(PDF) 1 Page - Vitesse Semiconductor Corporation |
|
VSC8140TW Datasheet(HTML) 1 Page - Vitesse Semiconductor Corporation |
1 / 34 page © VITESSE SEMICONDUCTOR CORPORATION Page 1 9/6/00 741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896 VITESSE SEMICONDUCTOR CORPORATION Data Sheet VSC8140 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator G52251-0, Rev. 4.0 Features General Description The VSC8140 is a SONET/SDH compatible transceiver with integrated clock generator for use in SONET/ SDH systems operating at a 2.48832Gb/s data rate. The internal clock generator uses a Phase-Locked Loop (PLL) to multiply either a 77.76MHz or 155.52MHz reference clock in order to provide the 2.48832GHz clock for internal logic and output retiming. The 16-bit parallel interface incorporates an on-board FIFO eliminating loop timing design issues by providing a flexible parallel timing architecture. In addition, the device provides both facility and equipment loopback modes and two loop timing modes. The VSC8140 operates using a 3.3V power supply, and is available in either a thermally-enhanced 128-PQFP or a thermally-enhanced 208-pin TBGA package. VSC8140 Block Diagram • 2.48832Gb/s 16-Bit Transceiver • Targeted for SONET OC-48 / SDH STM-16 Applications • LVPECL Low-Speed Interface • On-chip PLL-Based Clock Generator • High-Speed Clock Output With Power-Down Option • Supports Parity at the 16-Bit Parallel Transmit and Receive Interfaces • Provides Equipment, Facilities and Split Loop- back Modes as well as Loop Timing Modes • Loss of Signal (LOS) Detect input • Meets Bellcore Jitter Performance Specifications • Single +3.3V Supply • 2.25 Watts Typical Power Dissipation • Packages: 128-pin PQFP or 208-pin TBGA RXOUT15 TXIN15 RXOUT0 RXPARITYOUT RXCLK16O+ RXCLK16O- RXCLKIN+ RXCLKIN- RXCLKO16_32+ RXCLKO16_32- Divide by 2 TXIN0 TXPARITYIN TXCLK16O+ TXCLK16O- TXOUT+ TXOUT- Divide by 16 REFCLK+ REFCLK- 2.48832GHz PLL TXCLK16I+ TXCLK16I- Q D FACLOOP LOOPTIM0 FIFO CNTRL FIFORESET Divide by 16 EQULOOP D Q RXIN+ RXIN- TXCLKOUT+ TXCLKOUT- LPTIMCLK+ LPTIMCLK- Write Pointer Read Pointer PARERR LOS POL OVERFLOW VREFOUT voltage gen. REF_FREQSEL LOOPTIM1 PARMODE RXCLKO_FREQSEL VREFIN CLK128O+ CLK128O- Divide by 128 |
Similar Part No. - VSC8140TW |
|
Similar Description - VSC8140TW |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |