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MSM7702-02 Datasheet(PDF) 6 Page - OKI electronic componets |
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MSM7702-02 Datasheet(HTML) 6 Page - OKI electronic componets |
6 / 17 page ¡ Semiconductor MSM7702-01/02/03 6/17 DG Ground for the digital signal circuits. This ground is separate from the analog signal ground. The DG pin must be connected to the AG pin on the printed circuit board to make a common analog ground. PDN Power down control signal. A logic "0" level drives both transmit and receive circuits to a power down state. PCMOUT PCM signal output. The PCM output signal is output from MSD in a sequential order, synchronizing with the rising edge of the BCLK signal. MSD may be output at the rising edge of the XSYNC signal, based on the timing between BCLK and XSYNC. This pin is in a high impedance state except during 8-bit PCM output. It is also in a high impedance state during power saving or power down. A pull-up resistor must be connected to this pin because its output is configured as an open drain. This device is compatible with the ITU-T recommendation on coding law and output coding format. The MSM7702-03 (A-law) outputs the character signal, inverting the even bits. Input/Output Level +Full scale +0 –0 –Full scale PCMIN/PCMOUT MSM7702-02 ( m-law) MSD 1000 0000 1111 1111 0111 1111 0000 0000 MSM7702-03 (A-law) MSD 1010 1010 1101 0101 0101 0101 0010 1010 |
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Similar Description - MSM7702-02 |
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