IC61LV256

Integrated Circuit Solution Inc.

3

AHSR027-0B

11/28/2003

PIN CONFIGURATION

28-Pin SOJ

22

23

24

25

26

27

28

1

2

3

4

5

6

7

21

20

19

18

17

16

15

14

13

12

11

10

9

8

OE

A11

A9

A8

A13

WE

VCC

A14

A12

A7

A6

A5

A4

A3

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

A0

A1

A2

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O0

I/O1

I/O2

GND

VCC

WE

A13

A8

A9

A11

OE

A10

CE

I/O7

I/O6

I/O5

I/O4

I/O3

PIN CONFIGURATION

8x13.4mm TSOP-1

PIN DESCRIPTIONS

A0-A14

Address Inputs

CE

Chip Enable Input

OE

Output Enable Input

WE

Write Enable Input

I/O0-I/O7

Input/Output

Vcc

Power

GND

Ground

TRUTH TABLE

Mode

WE

WE

WE

WE

WE

CE

CE

CE

CE

CE

OE

OE

OE

OE

OE

I/O Operation

Vcc Current

Not Selected

X

H

X

High-Z

(Power-down)

Output Disabled

H

L

H

High-Z

Read

H

L

L

Write

L

L

X

Symbol

Parameter

Value

Unit

Power Supply Voltage Relative to GND

–0.5 to +4.6

V

Terminal Voltage with Respect to GND

–0.5 to +4.6

V

Temperature Under Bias

Com.

–10 to +85

°C

Ind.

–45 to +90

Storage Temperature

–65 to +150

°C

Power Dissipation

1

W

DC Output Current

±20

mA

Notes:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent

damage to the device. This is a stress rating only and functional operation of the device at these or any

other conditions above those indicated in the operational sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended periods may affect reliability.