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MSM7712 Datasheet(PDF) 5 Page - OKI electronic componets |
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MSM7712 Datasheet(HTML) 5 Page - OKI electronic componets |
5 / 20 page –––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s MSM7712 s 5 Oki Semiconductor INTERFACE DESCRIPTIONS Processor Interface Most applications (e.g. PC add-in cards) require a local processor to handle the higher layers of the IEEE 802.11 protocol. The host computer typically runs a NDIS or ODI driver that communicates to the local processor via shared memory and interrupts. The local processor performs the higher layers of the IEEE 802.11 MAC protocol while the MSM7712GS-K performs the lower layers of MAC and the PHY under control of the local processor. The MSM7712 can be configured to operate with 80C80 (V30) and 80C186 processor types. The processor configuration P_CONF is determined from the level of the PD lines during the MSM7712 reset. Designers should consult the appropriate processor datasheets and this section to understand how the processor interface works. No external circuitry is required between the processor and the MSM7712. Table 1 specifies the connec- tion of various processor signals to the MSM7712. The output signal PREADYN, PINTN, PRESETN are active low or high to suit the different processor requirements P_CONF option 1 provides an interface to the 80C86 or V30 processor. The processor must be set to max- imum mode and a device with a 50% mark/space clock ratio at 16MHz and must be used (assuming a CSCK of 32 MHz). P_CONF option 2 provides an interface to the 80C186 processor family with a 32 Mhz oscillator input. All other values of P_CONF are reserved and should not be used. Processor Options MSM7712GS-K 80C86, V30 (Max mode) 80C186 P_CONF 1 2 PA[17:16] A[17:16] AD[17:16] PD[15:0] AD[15:0] AD[15:0] PST2 BS2 S2 PST1 BS1 S1 PST0 BS0 S0 PREAD - - PUBE UBE BHE PCLKOUT - CLKOUT PREADYN READY SRDY PINTN INT INT0 PRESETN RESET RES PCLK CLK X1 |
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