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MSM82C55A-2GS Datasheet(PDF) 5 Page - OKI electronic componets |
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MSM82C55A-2GS Datasheet(HTML) 5 Page - OKI electronic componets |
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5 / 26 page  5/26 ¡ Semiconductor MSM82C55A-2RS/GS/VJS AC CHARACTERISTICS Min. Max. Setup Time of Address to the Falling Edge of RD tAR 20 —ns Hold Time of Address to the Rising Edge of RD tRA 0 —ns Parameter Unit Symbol Remarks Setup Time of Address before the Falling Edge of WR tAW 0 —ns Load 150 pF (VCC = 4.5 V to 5.5 V, Ta = –40 to +85°C) MSM82C55A-2 Delay Time from the Falling Edge of RD to the Output of Defined Data tRD — 120 ns Delay Time from the Rising Edge of RD to the Floating of Data Bus tDF 10 75 ns Time from the Rising Edge of RD or WR to the Next Falling Edge of RD or WR tRV 200 —ns RD Pulse Width tRR 100 —ns Hold Time of Address after the Rising Edge of WR tWA 20 —ns WR Pulse Width tWW 150 —ns Setup Time of Bus Data before the Rising Edge of WR tDW 50 —ns Hold Time of Bus Data after the Rising Edge of WR tWD 30 —ns Delay Time from the rising Edge of WR to the Output of Defined Data tWB — 200 ns Setup Time of Port Data before the Falling Edge of RD tIR 20 —ns Hold Time of Port Data after the Rising Edge of RD tHR 10 —ns ACK Pulse Width tAK 100 —ns STB Pulse Width tST 100 —ns Setup Time of Port Data before the rising Edge of STB tPS 20 —ns Hold Time of Port Bus Data after the rising Edge of STB tPH 50 —ns Delay Time from the Falling Edge of ACK to the Output of Defined Data tAD — 150 ns Delay Time from the Rising Edge of ACK to the Floating of Port (Port A in Mode 2) tKD 20 250 ns Delay Time from the Rising Edge of WR to the Falling Edge of OBF tWOB — 150 ns Delay Time from the Falling Edge of ACK to the Rising Edge of OBF tAOB — 150 ns Delay Time from the Falling Edge of STB to the Rising Edge of IBF tSIB — 150 ns Delay Time from the Rising Edge of RD to the Falling Edge of IBF tRIB — 150 ns Delay Time from the the Falling Edge of RD to the Falling Edge of INTR tRIT — 200 ns Delay Time from the Rising Edge of STB to the Rising Edge of INTR tSIT — 150 ns Delay Time from the Rising Edge of ACK to the Rising Edge of INTR tAIT — 150 ns Delay Time from the Falling Edge of WR to the Falling Edge of INTR tWIT — 250 ns Note: Timing measured at VL = 0.8 V and VH = 2.2 V for both inputs and outputs. |
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