TC5299J
-6-
Ver. 0.1
07/04/01
EEPROM/LED Interface Pins
Symbol
Pin #
I/O
Description
EECS
73
O
EEPROM chip select. It is asserted when to access EEPROM.
EESK/LEDLA
72
O
Link (on/off) & Receive data (Blink) LED pin. It is also used as a
serial clock for EEPROM data loading.
DO/LEDS
70
I/O
Speed (100M:ON/10M:OFF) & transmit data (Blink) LED pin. It
is also used as a signal for EEPROM data loading.
DI/LEDF
69
O
Full-duplex (ON/OFF, Full/Half-duplex) & Collision (Blink)
LED pin. It is a data output pin for EEPROM writing.
External PHY / MII Interface Pins
Symbol
Pin #
I/O
Description
TXD[3:0]
42-43,
45-46
O
Four parallel transmit data lines. This data is synchronized to the
assertion of the TXC signal and is latched by the external PHY
on the rising edge of the TXC signal.
TXEN
47
I/O
This pin function as transmit enable. It indicates that a
transmission is active on the MII port to an external PHY device.
Pull down this pin on power-on reset to select 50MHz-clock
input from pin X1. Otherwise, use 25MHz-clock input.
TXC
48
I
Supports the transmit clock supplied by the external PMD device.
This clock should always be active.
RXD[3:0]
58-57,
55-54
I
Four parallel receive data lines. This data is driven by an external
PHY that attached the media and should be synchronized with
the RXC signal.
RXC
51
I
Supports receive clock from PHY. And is recovered by the PHY.
RXDV
52
I
Data valid is asserted by an external PHY when receive data is
present on the RXD[3:0] lines and is deasserted at the end of the
packet. This signal should be synchronized with the RXC signal.
RXER
50
I
Data valid is asserted by an external PHY when receive data is
present on the RXD[3:0] lines and is deasserted at the end of the
packet. This signal should be synchronized with the RXC signal.
COL
40
I
This pin functions as the collision detect. When the external
physical layer protocol (PHY) device detects a collision, it asserts
this pin.
CRS
39
I
In MII mode this pin functions as the carrier sense and is asserted
by the PHY when the media is active.
MDC
59
O
MII management data clock is sourced by the TC5299J to the
external PHY devices as a timing reference for the transfer of
information on the MDIO signal.
MDIO
74
I/O
MII management data input/output transfers control information
and status between the external PHY and the TC5299J.
EXLEDL
36
I
Low active; presents the external PHY link status.
EXLEDF
37
I
Present the half/full duplex mode for external PHY.
Clock Interface Pins
Symbol
Pin #
I/O
Description
X1
66
I
CRYSTAL OR EXTERNAL OSCILLATOR INPUT: 50 MHz
X2
67
O
CRYSTAL FEEDBACK OUTPUT: used in crystal connection
only.
X25M
53
O
25MHz clock output
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