UVEPROM

SMJ27C040

Austin Semiconductor, Inc.

SMJ27C040

Rev. 1.0 9/01

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

3

READ/OUTPUT DISABLE

When the outputs of two or more SMJ27C040s are connected

in parallel on the same bus, the output of any particular device

in the circuit can be read with no interference from

competing outputs of the other devices. To read the output of

a single device, a low level signal is applied to the E\ and G\

pins. All other devices in the circuit should have their outputs

disabled by applying a high level signal to one of these pins.

Output data is accessed at pins Q0-Q7.

LATCHUP IMMUNITY

Latchup immunity on the SMJ27C040 is a minimum of 250mA

on all inputs and outputs. This feature provides latchup

immunity beyond any potential transients at the P.C. board level

when the EPROM is interfaced to industry standard TTL or

MOS logic devices. The input/output layout approach

controls latchup without compromising performance or

packing density.

POWER DOWN

Active I

CC

supply current can be reduced from 70mA to 1mA

for a high TTL input on E\ and to 100µA for a high CMOS

input on E\. In this mode all outputs are in the high-

impedance state.

ERASURE

Before programming, the SMJ27C040 EPROM is erased by

exposing the chip through the transparent lid to a high

intensity ultraviolet-light (wavelength 2537 Å).

The

recommended minimum exposure dose (UV intensity x

exposure time) is 15-W

filterless UV lamp erases the device in 21 minutes. The lamp

should be located about 2.5cm above the chip during erasure.

After erasure, all bits are in the high state. It should be noted

that normal ambient light contains the correct wavelength for

erasure. Therefore, when using the SMJ27C040, the window

should be covered with an opaque label. After erasure (all

bits in logic high state), logic lows are programmed into the

desired locations. A programmed low can be erased only by

ultraviolet light.

SNAP! PULSE PROGRAMMING

The SMJ27C040 is programmed by using the SNAP! Pulse

programming algorithm. The programming sequence is shown

in the SNAP! Pulse programming flow chart (Figure 1).

The initial setup is V

PP

= 13V, V

CC

= 6.5V, E\ = V

IH

, and

G\ = V

IL

. Once the initial location is selected, the data is

presented in parallel (eight bits) on pins DQ1 through DQ8.

Once addresses and data are stable, the programming mode is

achieved when E\ is pulsed low (V

IL

) with a pulse duration of

t

W(PGM)

. Every location is programmed only once before

going to interactive mode.

In the interactive mode, the word is verified at V

PP

= 13V,

V

CC

= 6.5V, E\ = V

IH

, and G\ = V

IL

. If the correct data is not

read, the programming is performed by pulling G\ high, then

E\ low with a pulse duration of t

W(PGM)

. This sequence of

verification and programming is performed up to a maximum

of 10 times. When the device is fully programmed, all bytes

are verified with V

CC

= V

PP

= 5V ± 10%.

PROGRAM INHIBIT

Programming can be inhibited by maintaining high level

inputs on the E\ and G\ pins.

PROGRAM VERIFY

Programmed bits can be verified with V

PP

= 13V when

G\ = V

IL

, and E\ = V

IH

.

SIGNATURE MODE

The signature mode provides access to a binary code

identifying the manufacturer and type. This mode is activated

when A9 (pin 26) is forced to 12V. Two identifier bytes are

accessed by toggling A0. All other addresses must be held

low. The signature code for the SMJ27C040 is 9750. A0 low

selects the manufacturer’s code 97 (Hex), and A0 high

selects the device code 50 (Hex), as shown in Table 2.

TABLE 2. SIGNATURE MODES

A0

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

HEX

MANUFACTURER CODE

10010111

97

DEVICE CODE

01010000

50

IDENTIFIER*

PINS

* E\ = G\ = V

IL

, A1 - A8 = V

IL

, A9 = V

H

, A10 - A18 = V

IL

, V

PP

= V

CC

.