BUF12800

SBOS315 − DECEMBER 2004

www.ti.com

3

ELECTRICAL CHARACTERISTICS

At TA = +25°C, VS = 18V, VSD = 5V, VREFH = 17V, VREFL = 1V, RL = 1.5kΩ connected to ground, and CL = 200pF, unless otherwise noted.

BUF12800

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

ANALOG

Buffer Output Swing—High

Buffers A-F, Code = 1023, Sourcing 10mA, VREFH = 17.8

17.7

17.8

V

Buffers G-L, Code = 1023, Sourcing 10mA, VREFH = 17.8

16.3

16.98

V

Buffer Output Swing—Low

Buffers A-F, Code = 0, Sinking 10mA, VREFL = 0.2

1.0

1.1

V

Buffers G-L, Code = 0, Sinking 10mA, VREFL = 0.2

0.2

0.3

V

Buffer Output Reset and Power-Up Value

Buffer A

Code 3E0h (11 1110 0000)

16.452

16.502

16.552

V

Buffer B

Code 360h (11 0110 0000)

14.450

14.500

14.550

V

Buffer C

Code 320h (11 0010 0000)

13.450

13.500

13.550

V

Buffer D

Code 300h (11 0000 0000)

12.952

13.002

13.052

V

Buffer E

Code 2C0h (10 1100 0000)

11.952

12.002

12.052

V

Buffer F

Code 240h (10 0100 0000)

9.950

10.000

10.050

V

Buffer G

Code 1C0h (01 1100 0000)

7.955

8.005

8.055

V

Buffer H

Code 140h (01 0100 0000)

5.958

6.008

6.058

V

Buffer I

Code 100h (01 0000 0000)

4.957

5.007

5.057

V

Buffer J

Code 0E0h (00 1110 0000)

4.459

4.509

4.559

V

Buffer K

Code 0A0h (00 1010 0000)

3.457

3.507

3.557

V

Buffer L

Code 020h (00 0010 0000)

1.457

1.507

1.557

V

REFH Input Range

4

VS − 0.2

V

REFL Input Range

0.2

VS − 4

V

Integral Nonlinearity

INL

0.3

Bits

Differential Nonlinearity

DNL

0.3

Bits

Gain Error

0.12

%

Program to Out Delay

tD

5

µs

Output Accuracy

±20

±50

mV

vs Temperature

VREFH and VREFL Held Constant

±25

µV/°C

Input Resistance at VREFH and VREFL

RINH

100

M

Ω

Load Regulation, 10mA, All Buffers

REG

VOUT = VS/2, IOUT = +5mA to −5mA Step

0.5

1.5

mV/mA

50mA, Buffers A-F

VOUT = VS/2, ISINKING = 50mA, ISOURCING = 50mA

0.5

1.5

mV/mA

ANALOG POWER SUPPLY

Operating Voltage Range

VS

7

18

V

Total Analog Supply Current

IS

Outputs at Reset Values, No Load

9

15

mA

over Temperature

15

mA

DIGITAL

Logic 1 Input Voltage

0.7(VSD)

V

Logic 0 Input Voltage

0.3(VSD)

V

Logic 0 Output Voltage

ISINK = 3mA

0.15

0.4

V

Input Leakage

±0.01

±10

µA

Clock Frequency

fCLK

Standard/Fast Mode

400

kHz

High-Speed Mode

3.4

MHz

DIGITAL POWER SUPPLY

Operating Voltage Range

VSD

2.7

5.5

V

Digital Supply Current(1)

ISD

Outputs at Reset Values, No-Load, Two-Wire Bus Inactive

25

50

µA

over Temperature

100

µA

TEMPERATURE RANGE

Specified Range

−40

+85

°C

Operating Range

Junction Temperature < 125

°C

−40

+95

°C

Storage Range

−65

+150

°C

Thermal Resistance, TSSOP-24(2)

Junction-to-Ambient

qJA

30.13

°C/W

Junction-to-Case

qJC

0.92

°C/W

(1) See the typical characteristic Digital Supply Current vs Two-Wire Bus Activity.

(2) PowerPAD attached to PCB, 0lfm airflow, and 76mm x 76mm copper area.