SN74LVC543

OCTAL REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS

SCAS299A – JANUARY 1993 – REVISED JULY 1995

1

POST OFFICE BOX 655303

CMOS) Submicron Process

Per JEDEC Standard JESD-17

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages

description

This octal registered transceiver is designed for

The SN74LVC543 contains two sets of D-type latches for temporary storage of data flowing in either direction.

Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each

register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and

LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A

latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the

data present at the output of the A latches. Data flow for B to A is similar to that of A to B but uses CEBA, LEBA,

and OEBA.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC543 is characterized for operation from – 40

°C to 85°C.

FUNCTION TABLE†

INPUTS

OUTPUT

CEAB

LEAB

OEAB

A

B

H

X

X

X

Z

X

XH

X

Z

L

HL

X

B0‡

L

LL

L

L

L

L

L

H

H

† A-to-B data flow is shown; B-to-A flow control is the

same except that it uses CEBA, LEBA, and OEBA.

‡ Output level before the indicated steady-state input

conditions were established

Copyright

© 1995, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

EPIC is a trademark of Texas Instruments Incorporated.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DB, DW, OR PW PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

LEBA

OEBA

A1

A2

A3

A4

A5

A6

A7

A8

CEAB

GND

CEBA

B1

B2

B3

B4

B5

B6

B7

B8

LEAB

OEAB