8 / 14 page
YMU762
8
AC characteristics
/RST, CLKI
Item
Symbol
Min.
Typ.
Max.
Unit
/RST “L” pulse width
TRSTW
100
µs
/RST (indefinite → L) setup time
TRSTS
0
µs
CLKI frequency
1 / Tfreq
0
20
MHz
CLKI rise / fall time
Tr / Tf
30
ns
CLKI duty factor
Th / Tfreq
30
50
70
%
Note: TOP=-20 to 85°C, VDD, IOVDD=3.0±0.3V, Capacitor load=50 pF
The input to Clock can be stopped (=0Hz) during reset period and power down state (DP0=1).
However, the input level is to be H or L, and input of intermediate level is prohibited.
The reset width is defined as the time from the moment VDD or IOVDD has risen to 90%.
/RST has to be settled at “L” level at the time VDD or IOVDD has risen to 30%.
Measurement point
VIH
= 0.7*IOVDD
VIL
= 0.2*IOVDD
VOH = 0.8*IOVDD
VOL = 0.2*IOVDD
VIL= 0.2*IOVDD
/RST
TRSTW
VIL= 0.2*IOVDD
VDD, IOVDD
90%
30%
TRSTS
CLKI
Th
Tfreq
Tf
VIH= 0.7*IOVDD
VIL= 0.2*IOVDD
Tr
0.5*IOVDD
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
