LMX2335UTMX datasheet(4/48 Pages) NSC

Part #	LMX2335UTMX

Description	PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications

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Manufacturer	NSC [National Semiconductor (TI)]

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Pin Descriptions

Name

Pin No.

LMX2336U

20-Pin

UTCSP

Pin No.

LMX2336U

20-Pin

TSSOP

Pin No.

LMX2336U

24-Pin

CSP

Pin No.

LMX2335U

16-Pin

TSSOP

Pin No.

LMX2335U

16-Pin

CSP

I/O

Description

V

CC

20

1

24

1

16

–

Power supply bias for the RF1 PLL analog and

digital circuits. V

CC may range from 2.7V to

5.5V. Bypass capacitors should be placed as

close as possible to this pin and be connected

directly to the ground plane.

V

P

RF1

1

2

1

–

RF1 PLL charge pump power supply. Must be

≥

V

CC.

D

o

RF1

2

3

2

O

RF1 PLL charge pump output. The output is

connected to the external loop filter, which drives

the input of the VCO.

GND

3

4

3

–

LMX2335U: Ground for the RF1 PLL analog and

digital circuits.

LMX2336U: Ground for the RF1 PLL digital

circuitry.

f

IN RF1

4

5

4

I

RF1 PLL prescaler input. Small signal input from

the VCO.

f

IN RF1

5

6

X

I

LMX2335U: Don’t care.

LMX2336U: RF1 PLL prescaler complementary

input. For single ended operation, this pin should

be AC grounded. The LMX2336U RF1 PLL can

be driven differentially when the bypass

capacitor is omitted.

GND

6

7

X

–

LMX2335U: Don’t care.

LMX2336U: Ground for the RF1 PLL analog

circuitry.

OSC

in

7

8

6

5

I

Oscillator input. It has an approximate V

CC/2

input threshold and can be driven from an

external CMOS or TTL logic gate.

OSC

out

8

9

10

7

6

O

Oscillator output. This output is connected

directly to a crystal. If a TCXO is used, it is left

open.

F

oLD

9

10

11

8

7

O

Programmable multiplexed output pin. Functions

as a general purpose CMOS TRI-STATE output,

RF1/RF2 PLL push-pull analog lock detect

output, N and R divider output, or Fastlock

output, which connects a parallel resistor to the

external loop filter.

Clock

10

11

12

9

8

I

MICROWIRE Clock input. High impedance

CMOS input. Data is clocked into the 22-bit shift

register on the rising edge of Clock.

Data

11

12

14

10

9

I

MICROWIRE Data input. High impedance

CMOS input. Binary serial data. The MSB of

Data is entered first. The last two bits are the

control bits.

LE

12

13

15

11

10

I

MICROWIRE Latch Enable input. High

impedance CMOS input. When LE transitions

HIGH, Data stored in the shift registers is loaded

into one of 4 internal control registers.

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LMX2335UTMX Datasheet(PDF) 4 Page - National Semiconductor (TI)

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