78Q2132

1/10BASE-TX

HomePNA/Ethernet Transceiver

11

REGISTER DESCRIPTION

The 2132 implements twenty user accessible 16-bit registers which are accessible through the Station

Management Interface on the MDIO and MDC pins.

The supported registers are shown below. Unsupported

registers will be read as all zeros. All of the registers respond to the broadcast address, PHYAD value 00000.

The register map is implemented in two pages, with page 0 being the power-up reset default. Page 0 implements

the standard 802.3 MII registers along with the vendor specific register set. The vendor specific registers 16, 17,

18, 19 are mapped into both pages for convenience and to implement the page selection via bit MR19.0. Page 1

contains the HomePNA specific registers. The MII management 16-bit register set implemented in the 2132 is as

follows:

ADDRESS

Page

SYMBOL

NAME

RESET VALUE (HEX)

0

0

MR0

Control

(0000)

1

0

MR1

Status

(1801)

2

0

MR2

PHY Identifier 1

000E

3

0

MR3

PHY Identifier 2

7121

4

0

MR4

Auto-Negotiation Advertisement

(0061)

5

0

MR5

Auto-Negotiation Link Partner Ability

0000

6

0

MR6

Auto-Negotiation Expansion

0000

7

0

MR7

(Not implemented, read as zero)

0000

8-15

0

MR8-15

(Reserved, read as zero)

0000

16

both

MR16

Vendor Specific

(0141)

17

both

MR17

Interrupt Control/Status Register

0000

18

both

MR18

Diagnostic Register

(0000)

19

both

MR19

HomePNA Register

0000

0

1

P1R0

HomePNA Control

0004

1

1

P1R1

HomePNA Status

0000

2

1

P1R2

HomePNA IMASK

0000

3

1

P1R3

HomePNA ISTAT

0000

4,5

1

P1R4,5

HomePNA TX_PCOM

00000000

6,7

1

P1R6,7

HomePNA RX_PCOM

00000000

Note: MR 3.3:0 contains revision specific data.

LEGEND

TYPE

DESCRIPTION

TYPE

DESCRIPTION

R

Read-able by management

W

Write-able by management

RC

Cleared on a read operation

SC

Self clearing, write-able

0/1

Default value upon power-up or reset

(0/1)

Default value dependent on pin setting. The value in

brackets indicates typical case.

In above table, the (xxxx) denotes that some of the bit values are determined by pin settings, and so, the default

may be a bit different.