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8XC152JA Datasheet(PDF) 6 Page - Intel Corporation |
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8XC152JA Datasheet(HTML) 6 Page - Intel Corporation |
6 / 17 page 8XC152JAJBJCJD Pin Description (Continued) Pin Pin Description 47-40 65-58 Port 4 Port 4 is an 8-bit bidirectional IO port with internal pullups Port 4 pins that have 1s written to them are pulled high by the internal pullups and in that state can be used as inputs As inputs Port 4 pins that are externally being pulled low will source current (IIL on the data sheet) because of the internal pullups In addition Port 4 also receives the low-order address bytes during program verification 913 RST Reset input A logic low on this pin for three machine cycles while the oscillator is running resets the device An internal pullup resistor permits a power-on reset to be generated using only an external capacitor to VSS Although the GSC recognizes the reset after three machine cycles data may continue to be transmitted for up to 4 machine cycles after Reset is first applied 38 55 ALE Address Latch Enable output signal for latching the low byte of the address during accesses to external memory In normal operation ALE is emitted at a constant rate of the oscillator frequency and may be used for external timing or clocking purposes Note however that one ALE pulse is skipped during each access to external Data Memory While in Reset ALE remains at a constant high level 37 54 PSEN Program Store Enable is the Read strobe to External Program Memory When the 8XC152 is executing from external program memory PSEN is active (low) When the device is executing code from External Program Memory PSEN is activated twice each machine cycle except that two PSEN activations are skipped during each access to External Data Memory While in Reset PSEN remains at a constant high level 39 56 EA External Access enable EA must be externally pulled low in order to enable the 8XC152 to fetch code from External Program Memory locations 0000H to 0FFFH EA must be connected to VCC for internal program execution 23 32 XTAL1 Input to the inverting oscillator amplifier and input to the internal clock generating circuits 22 31 XTAL2 Output from the inverting oscillator amplifier NA 17 20 Port 5 Port 5 is an 8-bit bidirectional IO port with internal pullups Port 5 pins that 21 22 have 1s written to them are pulled high by the internal pullups and in that state can 38 39 be used as inputs As inputs Port 5 pins that are externally being pulled low will 40 49 source current (IIL on the data sheet) because of the internal pullups Port 5 is also the multiplexed low-order address and data bus during accesses to external program memory if EBEN is pulled high In this application it uses strong pullups when emitting 1s NA 67 66 Port 6 Port 6 is an 8-bit bidirectional IO port with internal pullups Port 6 pins that 52 57 have 1s written to them are pulled high by the internal pullups and in that state can 50 68 be used as inputs As inputs Port 6 pins that are externally pulled low will source 1 51 current (IIL on the data sheet) because of the internal pullups Port 6 emits the high-order address byte during fetches from external Program Memory if EBEN is pulled high In this application it uses strong pullups when emitting 1s NA 12 EBEN E-Bus Enable input that designates whether program memory fetches take place via Ports 0 and 2 or Ports 5 and 6 Table 1 shows how the ports are used in conjunction with EBEN NA 53 EPSEN E-bus Program Store Enable is the Read strobe to external program memory when EBEN is high Table 2 shows when EPSEN is used relative to PSEN depending on the status of EBEN and EA 6 |
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