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LTC3407EDD-2 Datasheet(PDF) 7 Page - Linear Technology |
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LTC3407EDD-2 Datasheet(HTML) 7 Page - Linear Technology |
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7 / 16 page  LTC3407-2 7 sn34072 34072fs decrease causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. Low Current Operation Two modes are available to control the operation of the LTC3407-2 at low currents. Both modes automatically switch from continuous operation to the selected mode when the load current is low. To optimize efficiency, the Burst Mode operation can be selected. When the load is relatively light, the LTC3407-2 automatically switches into Burst Mode operation, in which the PMOS switch operates intermittently based on load demand with a fixed peak inductor current. By run- ning cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs are minimized. The main control loop is interrupted when the output voltage reaches the desired regulated value. A hysteretic voltage comparator trips when ITH is below 0.35V, shutting off the switch and reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds 0.65V, turning on the switch and the main control loop which starts another cycle. For lower ripple noise at low currents, the pulse skipping mode can be used. In this mode, the LTC3407-2 continues to switch at a constant frequency down to very low currents, where it will begin skipping pulses. The effi- ciency in pulse skip mode can be improved slightly by connecting the SW node to the MODE/SYNC input which reduces the clock frequency by approximately 30%. Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases to 100% which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal p-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (See Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3407-2 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applica- tions Information Section). Low Supply Operation To prevent unstable operation, the LTC3407-2 incorpo- rates an Under-Voltage Lockout circuit which shuts down the part when the input voltage drops below about 1.65V. OPERATIO APPLICATIO S I FOR ATIO A general LTC3407-2 application circuit is shown in Figure 2. External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. Inductor Selection Although the inductor does not influence the operating frequency, the inductor value has a direct effect on ripple current. The inductor ripple current ∆IL decreases with higher inductance and increases with higher VIN or VOUT: ∆ = ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ I V fL V V L OUT O OUT IN • •– 1 Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is ∆IL = 0.3 • ILIM, where ILIM is the peak switch current limit. The largest ripple current ∆IL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: L V fI V V OUT OL OUT IN MAX = ∆ ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ • •– () 1 The inductor value will also have an effect on Burst Mode operation. The transition from low current operation |
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