LTC3407-2

10

sn34072 34072fs

Hot Swap is registered trademark of Linear Technology Corporation.

VV

R

R

⎛

⎝

⎜

⎞

⎠

⎟

06

1

2

1

.

Keeping the current small (<5µA) in these resistors maxi-

mizes efficiency, but making them too small may allow

stray capacitance to cause noise problems and reduce the

phase margin of the error amp loop.

To improve the frequency response, a feed-forward ca-

inductor or the SW line.

Power-On Reset

The POR pin is an open-drain output which pulls low when

either regulator is out of regulation. When both output

voltages are within ±8.5% of regulation, a timer is started

This delay can be significantly longer in Burst Mode

operation with low load currents, since the clock cycles

only occur during a burst and there could be milliseconds

of time between bursts. This can be bypassed by tying the

POR output to the MODE/SYNC input, to force pulse

skipping mode during a reset. In addition, if the output

voltage faults during Burst Mode sleep, POR could have a

slight delay for an undervoltage output condition and may

not respond to an overvoltage output. This can be avoided

by using pulse skipping mode instead. When either chan-

nel is shut down, the POR output is pulled low, since one

or both of the channels are not in regulation.

Mode Selection & Frequency Synchronization

The MODE/SYNC pin is a multipurpose pin which provides

mode selection and frequency synchronization. Connect-

provides the best low current efficiency at the cost of a

higher output voltage ripple. Connecting this pin to ground

selects pulse skipping mode, which provides the lowest

output ripple, at the cost of low current efficiency.

The LTC3407-2 can also be synchronized to an external

2.25MHz clock signal by the MODE/SYNC pin. During

synchronization, the mode is set to pulse skipping and the

top switch turn-on is synchronized to the rising edge of the

external clock.

Checking Transient Response

The regulator loop response can be checked by looking at

the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

overshoot or ringing that would indicate a stability

problem.

The initial output voltage step may not be within the

bandwidth of the feedback loop, so the standard second-

order overshoot/DC ratio cannot be used to determine

can be added to improve the high frequency response, as

creating a high frequency zero with R2, which improves

the phase margin.

The output voltage settling behavior is related to the

stability of the closed-loop system and will demonstrate

the actual overall supply performance. For a detailed

explanation of optimizing the compensation components,

including a review of control loop theory, refer to Applica-

tion Note 76.

In some applications, a more severe transient can be

caused by switching in loads with large (>1µF) input

capacitors. The discharged input capacitors are effectively

regulator can deliver enough current to prevent this prob-

lem, if the switch connecting the load has low resistance

and is driven quickly. The solution is to limit the turn-on

speed of the load switch driver. A Hot Swap

designed specifically for this purpose and usually incorpo-

rates current limiting, short-circuit protection, and soft-

starting.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

APPLICATIO S I FOR ATIO