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U4256BM-AFSG3 Datasheet(PDF) 9 Page - TEMIC Semiconductors |
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U4256BM-AFSG3 Datasheet(HTML) 9 Page - TEMIC Semiconductors |
9 / 14 page U4256BM Preliminary Information Rev. A2, 03-Nov-98 9 (14) FMOSCIN FMOSCIN is the preamplifier input for the FM/AM oscillator signal. 14860 FMOSCIN AMOSCIN Figure 6. MX2LO MX2LO is the buffered output of the crystal oscillator. V5 V5 OSCIN MX2LO 14861 Figure 7. DAC 1, 2 and 3 DAC 1 to 3 are the outputs for automatic tuner alignment. VS 14862 DAC1 Figure 8. EN, DATA, CLK All functions can be controlled via a 3-wire bus consisting of ENABLE, DATA and CLOCK. The bus is designed for microcontrollers which operate with 3 V supply voltage. Details of the data transfer protocol are shown in the table ‘Data Transfer’. VDD 14863 EN DATA CLK Figure 9. SWO1, 2, 3 and 4 All switching outputs are ‘open drain’ and can be set and reset by software control. Details are described in the data transfer protocol. 14864 SWO1 SWO2 SWO3 SWO4 Figure 10. |
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