Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

HX6656XVFC Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # HX6656XVFC
Description  32K x 8 ROM-SOI
Download  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC1 [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC1 - List of Unclassifed Manufacturers

HX6656XVFC Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

Back Button HX6656XVFC Datasheet HTML 3Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 4Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 5Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 6Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 7Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 8Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 9Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 10Page - List of Unclassifed Manufacturers HX6656XVFC Datasheet HTML 11Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
HX6656
7
Read Cycle
The ROM is asynchronous in operation, allowing the read
cycle to be controlled by address, chip select (NCS), or chip
enable (CE) (refer to Read Cycle timing diagram). To
perform a valid read operation, both chip select and output
enable (NOE) must be low and chip enable must be high.
The output drivers can be controlled independently by the
NOE signal. Consecutive read cycles can be executed with
NCS held continuously low, and with CE held continuously
high, and toggling the addresses.
For an address activated read cycle, NCS and CE must be
valid prior to or coincident with the activating address edge
transition(s). Any amount of toggling or skew between
address edge transitions is permissible; however, data
outputs will become valid TAVQV time following the latest
occurring address edge transition. The minimum address
activated read cycle time is TAVAV. When the ROM is
operated at the minimum address activated read cycle
time, the data outputs will remain valid on the I/O until
TAXQX time following the next sequential address transi-
tion.
To control a read cycle with NCS, all addresses and CE
must be valid prior to or coincident with the enabling NCS
edge transition. Address or CE edge transitions can occur
later than the specified setup times to NCS, however, the
valid data access time will be delayed. Any address edge
transition, which occurs during the time when NCS is low,
will initiate a new read access, and data outputs will not
become valid until TAVQV time following the address edge
transition. Data outputs will enter a high impedance state
TSHQZ time following a disabling NCS edge transition.
To control a read cycle with CE, all addresses and NCS
must be valid prior to or coincident with the enabling CE
edge transition. Address or NCS edge transitions can
occur later than the specified setup times to CE; however,
the valid data access time will be delayed. Any address
edge transition which occurs during the time when CE is
high will initiate a new read access, and data outputs will
not become valid until TAVQV time following the address
edge transition. Data outputs will enter a high impedance
state TELQZ time following a disabling CE edge transition.
DYNAMIC ELECTRICAL CHARACTERISTICS


Similar Part No. - HX6656XVFC

ManufacturerPart #DatasheetDescription
logo
HBH Microwave GmbH
HX6001 HBH-HX6001 Datasheet
20Kb / 1P
   15-21 GHz Active Harmonic Mixer
logo
Pulse A Technitrol Comp...
HX6062FNL PULSE-HX6062FNL Datasheet
477Kb / 3P
   MDL,SIN,1GP,1:1,SM,TU
HX6062NL PULSE-HX6062NL Datasheet
328Kb / 3P
   MDL,SIN,1GP,1:1,SM,TU
HX6080FNL PULSE-HX6080FNL Datasheet
500Kb / 3P
   MDL,DUAL,1GP,1:1,SM,TU
HX6080NL PULSE-HX6080NL Datasheet
343Kb / 3P
   MDL,DUAL,1GP,1:1,SM,TU
More results

Similar Description - HX6656XVFC

ManufacturerPart #DatasheetDescription
logo
List of Unclassifed Man...
HX6356 ETC1-HX6356 Datasheet
145Kb / 12P
   32K x 8 STATIC RAM-SOI
logo
Honeywell Solid State E...
HLX6256 HONEYWELL-HLX6256 Datasheet
153Kb / 12P
   32K x 8 STATIC RAM Low Power SOI
logo
List of Unclassifed Man...
HM23C256A ETC1-HM23C256A Datasheet
74Kb / 1P
   32K x 8 MASK ROM
logo
Everspin Technologies I...
MR256A08B EVERSPIN-MR256A08B Datasheet
1Mb / 24P
   32K x 8 MRAM
Rev. 6.5 3/2018
logo
List of Unclassifed Man...
HLX6228 ETC-HLX6228 Datasheet
156Kb / 12P
   128K x 8 STATIC RAM-Low Power SOI
logo
Honeywell Solid State E...
HX6228 HONEYWELL-HX6228 Datasheet
153Kb / 12P
   128K x 8 STATIC RAM-SOI HX6228
HX6256 HONEYWELL-HX6256 Datasheet
780Kb / 13P
   32K x 8 Static RAM
logo
Simtek Corporation
STK17T88 SIMTEK-STK17T88 Datasheet
581Kb / 28P
   32K x 8 AutoStore nvSRAM
logo
Cypress Semiconductor
CY62256V CYPRESS-CY62256V Datasheet
316Kb / 13P
   32K x 8 Static RAM
logo
List of Unclassifed Man...
U637256 ETC1-U637256 Datasheet
146Kb / 14P
   CapStore 32K x 8 nvSRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com