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G-LINK Technology
GLT41116
July 1998 (Rev. 1)
1. These READ cycles may also be BYTE READ cycles (either UCAS or LCAS active).
2. These WRITE cycles may also be BYTE READ cycles (either UCAS or LCAS active).
3. EARLY WRITE Only.
4. At least one of the two CAS signals must be active (UCAS or LCAS).
Truth Table
Function
Address
RAS
CASL
CASH
WE
OE
DQ
Notes
Stand By
H
H
→ XH → X
X
X
High-Z
Read: Word
Row/Col
L
L
L
H
l
Data Out
Read: Lower Byte
Row/Col
L
L
H
H
L
Lower Byte, Data-Out
Upper Byte, High-Z
Read: Upper Byte
Row/Col
L
HLHL
Lower Byte, High-Z
Upper Byte, Data Out
Write: Word (Early Write)
Row/Col
L
L
L
L
X
Data-In
Write: Lower Byte (Early)
Row/Col
L
L
H
L
X
Lower Byte, Data-In
Upper Byte, High-Z
Write: Upper Byte (Early)
Row/Col
L
H
L
L
X
Lower Byte, High-Z
Upper Byte, Data-In
Read Write
Row/Col
L
L
L
H
→ LL → H
Data-Out, Data-In
[1] [2]
Fast-Page Mode Read
1st Cycle
Row/Col
L
H
→ LH → L
H
L
Data-Out
[1]
2nd Cycle
Col
L
H
→ LH → L
L
X
Data-Out
[1]
Fast-Page Mode Write
1st Cycle
Row/Col
L
H
→ LH → L
L
X
Data-In
[2]
2nd Cycle
Col
L
H
→ LH → L
L
X
Data-In
[2]
Fast-Page Mode Read-Write
1st Cycle
Row/Col
L
H
→ LH → LH → LL → H
Data-Out, Data-In
[1] [2]
2nd Cycle
Col
L
H
→ LH → LH → LL → H
Data-Out, Data-In
[1] [2]
Hidden Refresh
Read
Row/Col
L
→ H → L
L
L
H
L
Data-Out
[1]
Write
Row/Col
L
→ H → L
L
L
L
X
Data-In
[2] [3]
RAS-Only Refresh
Row
L
H
H
X
X
High-Z
CBR Refresh
H
→ L
L
L
X
X
High-Z
[4]
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