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MAX9205EAI Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX9205EAI Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 13 page 10-Bit Bus LVDS Serializers _______________________________________________________________________________________ 9 PWRDN TCLK OUT ± tPL ACTIVE 2.0V 0.8V 1.5V tHZ OR tLZ tZH OR tZL SYNC 1 = SYNC 2 = LOW EN = HIGH TCLK_R/F = HIGH HIGH IMPEDANCE HIGH IMPEDANCE Figure 7. PLL Lock Time and PWRDN High-Impedance Delays TCLK OUT ± IN IN0 - IN9 SYMBOL N IN0 - IN9 SYMBOL N + 1 tSD START BIT VDIFF = 0 VDIFF = (OUT+) - (OUT-) TCLK_ R/F = HIGH 1.5V STOP BIT START BIT STOP BIT OUT0 - OUT9 SYMBOL N+1 OUT0 - OUT9 SYMBOL N TIMING SHOWN FOR TCLK_R/F = HIGH Figure 8. Serializer Delay (OUT+) - (OUT-) WAVEFORM SUPERIMPOSED RANDOM DATA O DIFFERENTIAL tDJIT Figure 9. Definition of Deterministic Jitter (tDJIT) (OUT+) - (OUT-) WAVEFORM "CLOCK" PATTERN (1010...) tRJIT tRJIT O DIFFERENTIAL Figure 10. Definition of Random Jitter (tRJIT) |
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