Integrated Silicon Solution, Inc. — 1-800-379-4774

7

Rev. D

05/04/01

IS62LV5128LL

-70

-85

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Write Cycle Time

70

—

85

—

ns

CE to Write End

65

—

70

—

ns

Address Setup Time to Write End

65

—

70

—

ns

Address Hold from Write End

0

—

0

—

ns

Address Setup Time

0

—

0

—

ns

WE Pulse Width

60

—

60

—

ns

Data Setup to Write End

30

—

35

—

ns

Data Hold from Write End

0

—

0

—

ns

WE LOW to High-Z Output

—

33

—

35

ns

WE HIGH to Low-Z Output

5

—

5

—

ns

Notes:

1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof1.5V,inputpulselevelsof0.4Vto2.2VandoutputloadingspecifiedinFigure1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Theinternalwritetimeisdefinedbytheoverlapof

CELOWandWELOW. AllsignalsmustbeinvalidstatestoinitiateaWrite,butanyonecangoinactivetoterminatethe

Write. TheDataInputSetupandHoldtimingarereferencedtotherisingorfallingedgeofthesignalthatterminatestheWrite.

4. Tested with

OE HIGH.

DATA-IN VALID

DATA UNDEFINED

HIGH-Z

ADDRESS

CE

WE

DOUT

DIN

AC WAVEFORMS