June 28, 2004 S25FL004D_00A0

S25FL Family (Serial Peripheral Interface) S25FL004D

3

Ad va nc e

In forma t i o n

Table of Contents

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . .5

Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 5

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .6

Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . .7

SPI Modes ...................................................................................................7

Figure 1. Bus Master and Memory Devices on the SPI Bus ....... 8

Figure 2. SPI Modes Supported............................................ 8

Operating Features . . . . . . . . . . . . . . . . . . . . . . . . .9

Page Programming .................................................................................. 9

Sector Erase, or Bulk Erase ................................................................. 9

Polling During a Write, Program, or Erase Cycle ........................ 9

Status Register ......................................................................................... 9

Protection Modes ..................................................................................10

Table 1. Protected Area Sizes (S25FL004D). .........................10

Hold Condition Modes ........................................................................10

Figure 3. Hold Condition Activation...................................... 11

Memory Organization . . . . . . . . . . . . . . . . . . . . . . 12

Table 2. Sector Address Table – S25FL004D .........................12

Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 3. Instruction Set. ....................................................13

Write Enable (WREN) .........................................................................14

Figure 4. Write Enable (WREN) Instruction Sequence............. 14

Write Disable (WRDI) ........................................................................14

Figure 5. Write Disable (WRDI) Instruction Sequence ............ 14

Read Status Register (RDSR) ............................................................. 15

Figure 6. Read Status Register (RDSR)

Instruction Sequence ........................................................ 15

Figure 7. Status Register Format......................................... 15

Write Status Register (WRSR) .......................................................... 16

Figure 8. Write Status Register (WRSR)

Instruction Sequence ........................................................ 17

Table 4. Protection Modes ..................................................17

Read Data Bytes (READ) ....................................................................18

Figure 9. Read Data Bytes (READ) Instruction Sequence ........ 18

Read Data Bytes at Higher Speed (FAST_READ) .......................18

Figure 10. Read Data Bytes at Higher Speed

(FAST_READ) Instruction Sequence..................................... 19

Page Program (PP) ................................................................................. 19

Figure 11. Page Program (PP) Instruction Sequence .............. 20

Sector Erase (SE) ..................................................................................20

Figure 12. Sector Erase (SE) Instruction Sequence ................ 21

Bulk Erase (BE) ....................................................................................... 21

Figure 13. Bulk Erase (BE) Instruction Sequence................... 22

Deep Power Down (DP) ....................................................................22

Figure 14. Deep Power Down (DP) Instruction Sequence ........ 23

Release from Deep Power Down (RES) ....................................... 23

Figure 15. Release from Deep Power Down I

nstruction Sequence.......................................................... 24

Release from Deep Power Down and Read Electronic

Signature (RES) ......................................................................................24

Figure 16. Release from Deep Power Down and Read Electronic

Signature (RES) Instruction Sequence ................................. 25

Power-up and Power-down . . . . . . . . . . . . . . . . . . 26

Figure 17. Power-Up Timing ............................................... 27

Figure 18. Power-Down and Voltage Drop ............................ 27

Table 5. Power-Up Timing ................................................. 28

Initial Delivery State . . . . . . . . . . . . . . . . . . . . . . . 28

Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 28

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 28

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 6. DC Characteristics ............................................... 29

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 19. AC Measurements I/O Waveform ......................... 30

Table 7. Test Specifications ............................................... 30

Table 8. AC Characteristics ................................................ 31

Figure 20. SPI Mode 0 (0,0) Input Timing............................. 32

Figure 21. SPI Mode 0 (0,0) Output Timing .......................... 32

Figure 22. HOLD# Timing .................................................. 33

Figure 23. Write Protect Setup and Hold Timing during WRSR when

SRWD=1 ......................................................................... 33

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . 34

S08 wide—8-pin Plastic Small Outline 208mils Body Width

Package ................................................................................................... 34

8-Contact WSON (6mm x 5mm) Leadless Package .................35

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . 36