PIC18F6390/6490/8390/8490

DS80207B-page 6

© 2005 Microchip Technology Inc.

16. Module: Interrupts

If an interrupt occurs during a two-cycle instruction

that modifies the STATUS, BSR or WREG register,

the unmodified value of the register will be saved

to the corresponding Fast Return (Shadow)

register and upon a fast return from the interrupt,

the unmodified value will be restored to the

STATUS, BSR or WREG register.

For example, if a high priority interrupt occurs

during the instruction, MOVFF TEMP, WREG, the

MOVFF

instruction will be completed and WREG

will be loaded with the value of TEMP before

branching to ISR. However, the previous value of

WREG will be saved to the Fast Return register

during ISR branching. Upon return from the

interrupt with a fast return, the previous value of

WREG in the Fast Return register will be written to

WREG. This results in WREG containing the value

it had before execution of MOVFF TEMP, WREG.

Affected instructions are:

MOVFF

Fs, Fd

where Fd is WREG, BSR or STATUS;

MOVSF

Zs, Fd

where Fd is WREG, BSR or STATUS; and

MOVSS

[Zs], [Zd]

where the destination is WREG, BSR or STATUS.

Work around

1. Assembly Language Programming: If any two-

cycle instruction is used to modify the WREG,

BSR or STATUS register, do not use the

RETFIE FAST

instruction to return from the

interrupt. Instead, save/restore WREG, BSR

and STATUS via software per Example 8-1 in

the Device Data Sheet. Alternatively, in the

case of MOVFF, use the MOVF instruction to

write to WREG instead. For example, use:

MOVF TEMP, W

MOVWF BSR

instead of MOVFF TEMP, BSR.

2. C Language Programming: The exact work

around depends on the compiler in use. Please

refer to your C compiler documentation for

details.

define both high and low priority interrupt

handler functions as “low priority” by using the

pragma interruptlow

directive.

This

directive instructs the compiler to not use the

RETFIE

FAST

instruction. If the proper high

priority interrupt bit is set in the IPRx register,

then the interrupt is treated as high priority in

spite of the pragma interruptlow directive.

The following code snippet demonstrates the

work around using the C18 compiler:

Date Codes that pertain to this issue:

All engineering and production devices.

#pragma interruptlow MyLowISR

void MyLowISR(void)

{

// Handle low priority interrupts.

}

// Although MyHighISR is a high priority interrupt, use interruptlow pragma so that

// the compiler will not use retfie FAST.

#pragma interruptlow MyHighISR

void MyHighISR(void)

{

// Handle high priority interrupts.

}

#pragma code highVector=0x08

void HighVector (void)

{

_asm goto MyHighISR _endasm

}

#pragma code /* return to default code section */

#pragma code lowVector=0x18

void LowVector (void)

{

_asm goto MyLowISR _endasm

}

#pragma code /* return to default code section */