DDR SDRAM

DDR SDRAM 256Mb D-die (x8, x16)

Rev. 1.1 Feb. 2003

8M x 8Bit x 4 Banks / 4M x 16Bit x 4 Banks Double Data Rate SDRAM

The K4H560838D / K4H561638D is 268,435,456 bits of double data rate synchronous DRAM organized as 4x 8,388,608 / 4x 4,194,304

words by 8/16bits, fabricated with SAMSUNG

′s high performance CMOS technology. Synchronous features with Data Strobe allow

extremely high performance up to 400Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating frequen-

cies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory

system applications.

General Description

Absolute Maximum Ratings

Parameter

Symbol

Value

Unit

-0.5 ~ 3.6

V

-1.0 ~ 3.6

V

Storage temperature

-55 ~ +150

°C

Power dissipation

1.5

W

Short circuit current

50

mA

Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.

Functional operation should be restricted to recommend operation condition.

Exposure to higher than recommended voltage for extended periods of time could affect device reliability.

DC Operating Conditions

°C)

Parameter

Symbol

Min

Max

Unit

Note

2.5

2.7

5

I/O Supply voltage

2.5

2.7

V

5

I/O Reference voltage

0.49*VDDQ

0.51*VDDQ

V

1

I/O Termination voltage(system)

V2

Input logic high voltage

V

Input logic low voltage

-0.3

V

Input Voltage Level, CK and CK inputs

-0.3

V

Input Differential Voltage, CK and CK inputs

0.36

V

3

V-I Matching: Pullup to Pulldown Current Ratio

VI(Ratio)

0.71

1.4

-

4

Input leakage current

-2

2

uA

Output leakage current

-5

5

uA

-16.8

mA

16.8

mA

-9

mA

9mA

1.VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same.

Peak-to peak noise on VREF may not exceed +/-2% of the dc value.

4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire

temperature and voltage range, for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the

maximum difference between pullup and pulldown drivers due to process variation. The full variation in the ratio of the

maximum to minimum pullup and pulldown current will not exceed 1/7 for device drain to source voltages from 0.1 to 1.0.

5. This is the DC voltage supplied at the DRAM and is inclusive of all noise up to 20MHz. Any noise above 20MHz at the DRAM

generated from any source other than the DRAM itself may not exceed the DC voltage range of 2.6V +/-100mV.

Note :