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LTC6900IS5 Datasheet(PDF) 5 Page - Linear Technology |
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LTC6900IS5 Datasheet(HTML) 5 Page - Linear Technology |
5 / 12 page LTC6900 5 6900f PI FU CTIO S V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1 µFcapacitor. GND (Pin 2): Ground. Should be tied to a ground plane for best performance. SET (Pin 3): Frequency-Setting Resistor Input. The value of the resistor connected between this pin and V+ deter- mines the oscillator frequency. The voltage on this pin is held by the LTC6900 to approximately 1.1V below the V+ voltage. For best performance, use a precision metal film resistor with a value between 10k Ω and 2MΩ and limit the capacitance on this pin to less than 10pF. DIV (Pin 4): Divider-Setting Input. This three-state input selects among three divider settings, determining the value of N in the frequency equation. Pin 4 should be tied to GND for the ÷1 setting, the highest frequency range. Floating Pin 4 divides the master oscillator by 10. Pin 4 should be tied to V+ for the ÷100 setting, the lowest frequency range. To detect a floating DIV pin, the LTC6900 attempts to pull the pin toward midsupply. Therefore, driving the DIV pin high requires sourcing approximately 2 µA. Likewise, driving DIV low requires sinking 2µA. When Pin 4 is floated, it should preferably be bypassed by a 1nF capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other PCB traces. OUT (Pin 5): Oscillator Output. This pin can drive 5k Ω and/or 10pF loads. Heavier loads may cause inaccuracies due to supply bounce at high frequencies. Voltage tran- sients, coupled into Pin 5, above or below the LTC6900 power supplies will not cause latchup if the current into/ out of the OUT pin is limited to 50mA. BLOCK DIAGRA – + 1 3 GAIN = 1 V+ VBIAS IRES IRES RSET SET GND PATENT PENDING MASTER OSCILLATOR PROGRAMMABLE DIVIDER (N) ( ÷1, 10 OR 100) VRES = (V + – V SET) = 1.1V TYPICALLY IRES (V+ – VSET) ƒMO = 10MHz • 20kΩ • THREE-STATE INPUT DETECT GND V+ 2 µA 6900 BD 2 µA OUT DIVIDER SELECT 5 DIV 4 2 + – + – |
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