Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

SP8855DKGHCAR Datasheet(PDF) 4 Page - Zarlink Semiconductor Inc

Part # SP8855DKGHCAR
Description  1.7GHz PARALLEL LOAD PROFESSIONAL SYNTHESISER
Download  14 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

SP8855DKGHCAR Datasheet(HTML) 4 Page - Zarlink Semiconductor Inc

  SP8855DKGHCAR Datasheet HTML 1Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 2Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 3Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 4Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 5Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 6Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 7Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 8Page - Zarlink Semiconductor Inc SP8855DKGHCAR Datasheet HTML 9Page - Zarlink Semiconductor Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 14 page
background image
SP8855D
10
gain can be modified when new frequency data is entered to
compensate for change in the VCO gain characteristic over its
frequency band. The charge pump pulse current is
determined by the current fed into pin 19 and is approximately
equal to pin 19 current when the programmed multiplication
ratio is one. The circuit diagram Fig. 7e shows the internal
components on pin 19 which mirror the input current into the
charge pump. The voltage at pin 19 will be approximately 1.6V
above ground due to two Vbe drops in the current mirror. this
voltage will exhibit a negative temperature coefficient, causing
the charge pump current to change with chip temperature by
up to 10% over the full military temperature range if the current
programming resistor is connected to VCC as shown in the
application diagram Fig. 5. In critical applications where this
change in charge pump current would be too large the resistor
to pin 19 could be increased in value and connected to a
higher supply to reduce the effect of Vbe variation on the
current level. A suitable resistor connected to a 30V supply
would reduce the variation in pin 19
current due to
temperature to less than 1.5%. Alternatively a stable current
source could be used to set pin 19 current.
The charge pump output on pin 20 will only produce
symmetrical up and down currents if the voltage is equal to that
on the voltage reference pin 21. In order to ensure that this
voltage relationship is maintained, an operational amplifier
must be used as shown in the typical application Fig. 5. Using
this configuration pin 20 voltage will be forced to be equal to
that on pin 21 since the operational amplifier differential input
voltage will be no more than a few millivolts (the input offset
voltage of the amplifier). When the synthesiser is first switched
on or when a frequency outside the VCO range is programmed
the amplifier output will limit, allowing pin 20 voltage to differ
from that on pin 21. As soon as an achievable frequency value
is programmed and the amplifier output starts to slew the
correct voltage relationship between pin 20 and 21 will be
restored. Because of the importance of voltage equality
between the charge pump reference and output pins, a
resistor should never be connected in series with the
operational amplifier inverting input and pin 20 as is the case
with a phase detector giving voltage outputs. Any current
drawn from the charge pump reference pin should be limited
to the few micro amps input current of a typical operational
amplifier. A resistor between the charge pump reference and
the non inverting input could be added to provide isolation but
the value should not be so high that more than a few millivolts
drop are produced by the amplifier input current.
When selecting a suitable amplifer for the loop filter, a
number of parameters are important; input offset voltage in
most designs is only a few milivolts and an offset of 5mV will
produce a mismatch in the up and down currents of about 4%
with the charge pump multiplication factor set at 1. The
mismatch in up down currents caused by input offset voltage
will be reduced in proportion to the charge pump multiplication
factor in use. If the linearity of the phase detector about the
normal phase locked operating point is critical, the input offset
voltage of most amplifiers can be adjusted to near zero by
means of a potentiometer.
The charge pump reference voltage on pin 21 is about 1.3V
below the positive supply and will change with temperature
and with the programmed charge pump multiplication factor.
In many cases it is convenient to operate the amplifier with the
negative power supply pin connected to 0V as this removes
the need for an additional power supply. The amplifier selected
must have a common mode range to within 3.4V (minimum
charge pump reference voltage) of the negative supply pin to
operate correctly without a negative supply. Most popular
amplifiers can be operated from a 30V positive supply to give
a wide VCO voltage drive range and have adequate common
mode range to operate with inputs at +3.4V with respect to the
negative supply. Input bias and offset current levels to most
operational amplifiers are unlikely to be high enough to
significantly affect the accuracy of the charge pump circuit
currents but the bias current can be important in reducing
reference side bands and local oscillator drift during frequency
changes. When the loop is locked, the charge pump produces
only very narrow pulses of sufficient width to make up for any
charge lost from the loop filter components during the
reference cycle. The charge lost will be due to leakage from
the charge pump output pin and to the amplifier input bias
current, the latter usually being more significant. The result of
the lost charge is a sawtooth ripple on the VCO control line
which frequency modulates the phase locked oscillator at the
reference frequency and its harmonics.
It is possible to disable the charge pump by taking pin 39
low. In this case any leakage current will cause the oscillator
to drift off frequency. This feature may be useful where having
acheived lock an external phase detector of the user’s choice
can be employed to suit a specific application.
Fpd and Fref outputs
These outputs provide access to the outputs from the RF
and reference dividers and are provided for monitoring
purposes during product development or test, and for
connection of an external phase detector if required. the
output circuit is of ECL type, the circuit diagram being shown
in Fig.7g. The outputs can be enabled or disabled under
software control by the address 0 control word but are best left
in the disabled state when not required as the fast edge
speeds on the output can increase the level of reference
sidebands on the synthesised oscillator.
The emitter follower outputs have no internal pull down
resistor to save current and if the outputs are required an
external pull down resistor should be fitted.The value should
be kept as high as possible to reduce supply current, about
2.2k being suitable for monitoring with a high impedance
oscilloscope probe or for driving an AC coupled 50ohm load.
A minimum value for the pull down resistor is 330ohms. When
the Fpd and Fref outputs are disabled the output level will be at
the logic low level of about 3.5V so that the additional supply
current due to the load resistors will be present even when the
outputs are disabled.
Reference input
The reference input circuit functions as an input amplifier or
crystal oscillator. When an external reference signal is used
this is simply AC coupled to pin 28, the base of the input emitter
follower. When a low phase noise synthesiser is required the
reference signal is critical since any noise present here will be
multiplied by the loop. To obtain the lowest possible phase
noise from the SP8855D it is best to use the highest possible
reference input frequency and to divide this down internally to
obtain the required frequency at the phase detector. The
amplitude of the reference input is also important, and a level
close to the maximum will give the lowest noise. When the use
of a low reference input frequency say 4–10MHz is essential
some advantage may be gained by using a limiting amplifier
such as a CMOS gate to square up the reference input.
In cases where a suitable reference signal is not available,
it may be more convenient to use the input buffer as a crystal
oscillator in this case the emitter follower input transistor is
connected as a colpitts oscillator with the crystal connected
from the base to ground and with the feedback necessary for
oscillation provided by a capacitor tap at the emitter. The
arrangement is shown inset in Fig. 5.


Similar Part No. - SP8855DKGHCAR

ManufacturerPart #DatasheetDescription
logo
Mitel Networks Corporat...
SP8855 MITEL-SP8855 Datasheet
169Kb / 14P
   2.8GHz Parallel Load Professional Synthesiser
SP8855E MITEL-SP8855E Datasheet
169Kb / 14P
   2.8GHz Parallel Load Professional Synthesiser
logo
Zarlink Semiconductor I...
SP8855E ZARLINK-SP8855E Datasheet
453Kb / 14P
   2.8GHz Parallel Load Professional Synthesiser
logo
List of Unclassifed Man...
SP8855E ETC2-SP8855E Datasheet
1Mb / 14P
   2.8GHz Parallel Load Professional Synthesiser
More results

Similar Description - SP8855DKGHCAR

ManufacturerPart #DatasheetDescription
logo
Zarlink Semiconductor I...
SP8854D ZARLINK-SP8854D Datasheet
558Kb / 14P
   1.7GHz PARALLEL LOAD PROFESSIONAL SYNTHESISER
SP8852D ZARLINK-SP8852D Datasheet
555Kb / 14P
   1.7GHz PARALLEL LOAD PROFESSIONAL SYNTHESISER
logo
List of Unclassifed Man...
SP8855E ETC2-SP8855E Datasheet
1Mb / 14P
   2.8GHz Parallel Load Professional Synthesiser
logo
Zarlink Semiconductor I...
SP8854E ZARLINK-SP8854E Datasheet
585Kb / 14P
   2.7GHz Parallel Load Professional Synthesiser
SP8855E ZARLINK-SP8855E Datasheet
453Kb / 14P
   2.8GHz Parallel Load Professional Synthesiser
logo
Mitel Networks Corporat...
SP8854E MITEL-SP8854E Datasheet
176Kb / 13P
   2쨌7GHz Parallel Load Professional Synthesiser
SP8855E MITEL-SP8855E Datasheet
169Kb / 14P
   2.8GHz Parallel Load Professional Synthesiser
SP8852E MITEL-SP8852E Datasheet
174Kb / 13P
   2쨌7GHz Parallel Load Professional Synthesiser
logo
Zarlink Semiconductor I...
SP8852E ZARLINK-SP8852E Datasheet
224Kb / 15P
   2쨌7GHz Parallel Load Professional Synthesiser
SP8858 ZARLINK-SP8858 Datasheet
547Kb / 21P
   1쨌5GHz Professional Synthesiser
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com