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M470L3324DU0-CA2 Datasheet(PDF) 5 Page - Samsung semiconductor |
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M470L3324DU0-CA2 Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 20 page  DDR SDRAM 256MB, 512MB, 1GB Unbuffered SODIMM Rev. 0.1 June 2005 Preliminary Note : 1. * : These pins are not used in this module. 2. Pins 71, 72, 73, 74, 77, 78, 79, 80, 83, 84 are not used on x64(M470~ ) module, & used on x72(M485 ~ ) module. 3. Pins 95,122 are NC for 1Row module & used for 2Row moule(M470L6524DU0). Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back 1 VREF 67 DQ27 135 DQ34 2 VREF 68 DQ31 136 DQ38 3 VSS 69 VDD 137 VSS 4 VSS 70 VDD 138 VSS 5 DQ0 71 CB0 139 DQ35 6 DQ4 72 CB4 140 DQ39 7 DQ1 73 CB1 141 DQ40 8 DQ5 74 CB5 142 DQ44 9 VDD 75 VSS 143 VDD 10 VDD 76 VSS 144 VDD 11 DQS0 77 DQS8 145 DQ41 12 DM0 78 DM8 146 DQ45 13 DQ2 79 CB2 147 DQS5 14 DQ6 80 CB6 148 DM5 15 VSS 81 VDD 149 VSS 16 VSS 82 VDD 150 VSS 17 DQ3 83 CB3 151 DQ42 18 DQ7 84 CB7 152 DQ46 19 DQ8 85 DU 153 DQ43 20 DQ12 86 *DU/(RESET) 154 DQ47 21 VDD 87 VSS 155 VDD 22 VDD 88 VSS 156 VDD 23 DQ9 89 CK2 157 VDD 24 DQ13 90 VSS 158 CK1 25 DQS1 91 CK2 159 VSS 26 DM1 92 VDD 160 CK1 27 VSS 93 VDD 161 VSS 28 VSS 94 VDD 162 VSS 29 DQ10 95 CKE1 163 DQ48 30 DQ14 96 CKE0 164 DQ52 31 DQ11 97 DU 165 DQ49 32 DQ15 98 *DU(BA2) 166 DQ53 33 VDD 99 A12 167 VDD 34 VDD 100 A11 168 VDD 35 CK0 101 A9 169 DQS6 36 VDD 102 A8 170 DM6 37 CK0 103 VSS 171 DQ50 38 VSS 104 VSS 172 DQ54 39 VSS 105 A7 173 VSS 40 VSS 106 A6 174 VSS KEY 107 A5 175 DQ51 KEY 108 A4 176 DQ55 41 DQ16 109 A3 177 DQ56 42 DQ20 110 A2 178 DQ60 43 DQ17 111 A1 179 VDD 44 DQ21 112 A0 180 VDD 45 VDD 113 VDD 181 DQ57 46 VDD 114 VDD 182 DQ61 47 DQS2 115 A10/AP 183 DQS7 48 DM2 116 BA1 184 DM7 49 DQ18 117 BA0 185 VSS 50 DQ22 118 RAS 186 VSS 51 VSS 119 WE 187 DQ58 52 VSS 120 CAS 188 DQ62 53 DQ19 121 CS0 189 DQ59 54 DQ23 122 CS1 190 DQ63 55 DQ24 123 *DU(A13) 191 VDD 56 DQ28 124 DU 192 VDD 57 VDD 125 VSS 193 SDA 58 VDD 126 VSS 194 SA0 59 DQ25 127 DQ32 195 SCL 60 DQ29 128 DQ36 196 SA1 61 DQS3 129 DQ33 197 VDDSPD 62 DM3 130 DQ37 198 SA2 63 VSS 131 VDD 199 VDDID 64 VSS 132 VDD 200 DU 65 DQ26 133 DQS4 66 DQ30 134 DM4 Note : VDDID defines relationship of VDD and VDDQ, and the default status of it is open (VDD=VDDQ) Pin Name Function Pin Name Function A0 ~ A12 Address input (Multiplexed) DM0 ~7,8(for ECC) Data - in mask BA0 ~ BA1A Bank Select Address VDD Power supply (2.5V for DDR266/333, 2.6V for DDR400) DQ0 ~ DQ63 Data input/output VDDQ Power Supply for DQS (2.5V for DDR266/333, 2.6V for DDR400) DQS0 ~ DQS8 Data Strobe input/output VSS Ground CK0,CK0 ~ CK2, CK2 Clock input VREF Power supply for reference CKE0, CKE1(for double banks) Clock enable input VDDSPD Serial EEPROM Power/Supply ( 2.3V to 3.6V ) CS0, CS1(for double banks) Chip select input SDA Serial data I/O RAS Row address strobe SCL Serial clock CAS Column address strobe SA0 ~ 2 Address in EEPROM WE Write enable VDDID VDD, VDDQ level detection CB0 ~ CB7(for x72 module) Check bit(Data-in/data-out) NC No connection 5.0 Pin Description 4.0 Pin Configuration (Front side/back side) |
Similar Part No. - M470L3324DU0-CA2 |
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Similar Description - M470L3324DU0-CA2 |
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