Ordering Information

Note: Each device has 6 (six) detection voltage options, indicated by the -xx on the order code:

Description

Temperature Range

Order Code

DWG#

5-pin SOT23 (TSSOP5) plastic surface mount

-20 - +75

°C

NE56610-xxGW

TSSOP5

System Reset (100mS Typical Internal Reset Delay)

-20 - +75

°C

NE56611-xxGW

TSSOP5

System Reset (200mS Typical Internal Reset Delay)

-20 - +75

°C

NE56612-xxGW

TSSOP5

XX

Detect Voltage (Typ.)

XX

Detect Voltage (Typ.)

-25

2.5

-39

3.9

-27

2.7

-42

4.2

-29

2.9

-45

4.5

Features

• 12V DC Maximum Operating Voltage

• Low Operating Voltage (0.65 V)

• Internal Reset Delay Timer

• NE56610 (50 mS Typical)

• NE56611 (100mS Typical)

• NE56612 (200mS Typical)

• Offered in Reset Thresholds of 2.0, 2.7, 2.8, 2.9, 3.0, 3.1, 4.2,

4.3, 4.4, 4.5, 4.7 V DC

• Available in SSOP5 Surface Mount Package

• Manual Reset Input

General Description

The NE56610/11/12 series is a family of devices designed to generate a reset signal for a

variety of microprocessor and logic systems. Accurate reset signals are generated during

momentary power interruptions or when ever power supply voltages sag to intolerable levels.

The NE56610/11/12 incorporates an internal timer to provide reset delay and ensure proper

operating voltage has been attained. In addition, a manual reset pin is available. An Open

Collector output topology is incorporated to provide adaptability for a wide variety of logic and

microprocessor systems.

NE56610/11/12 is available in the TSSOP5 surface mount package.

Simplified Device Diagram

5

4

2

1

3

Reset

Delay

+

GND

SUB

M/R

NE56610/11/12

Applications

• Micro-Computer Systems

• Logic Systems

• Battery Monitoring Systems

• Back-Up Power Supply Circuits

• Voltage Detection Circuits

• Mechanical Reset Circuits

NE56610/11/12 Series

System Reset

Rev 0

February, 2001

Preliminary Product Specification

2

3

1

5

4

GND

SUB

M/R

TSSOP5