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UPD72012GB-XXX Datasheet(PDF) 11 Page - NEC |
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UPD72012GB-XXX Datasheet(HTML) 11 Page - NEC |
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11 / 36 page  Data Sheet S13918EJ3V0DS 11 µPD72012 1.3 Equivalent Circuits of Pins Type Equivalent Circuit Pins Function 5 V tolerant input pin (Schmitt) 5 V Schmitt on-chip RST, CS1 to CS5 3.3 V Schmitt input pin with 5 V tolerant. 5 V tolerant input pin 5 V CLKSEL, PSSEL, PVSEL 3.3 V input pin with 5 V tolerant. 5 V tolerant clock input pin 5 V X1, CLK/X2 3.3 V dedicated clock input pin with 5 V tolerant. 5 V tolerant 3.3 V output pin 3.3 V, I OL=6 mA OSL 3.3 V output pin with 5 V tolerant. Pull-up to 5 V line is possible. Open-drain output pin PP1 to PP5 Open-drain structure pin. USB buffer IN/OUT(D+) (D –) RxDATA RxSE0 TxDATA UD0, UD1, D10 to D50, D11 to D51 USB buffer. The two kinds of receiver are DATA receiver and SE0 (single end 0) receiver on the receiving side. On the sending side, rise and fall times are managed in the last stage of the buffer in order to create a difference between low-speed and full-speed. |
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Similar Description - UPD72012GB-XXX |
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