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UPD4481182GF-A44 Datasheet(PDF) 10 Page - NEC |
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UPD4481182GF-A44 Datasheet(HTML) 10 Page - NEC |
10 / 28 page 10 Data Sheet M15562EJ3V0DS µPD4481162, 4481182, 4481322, 4481362 State Diagram DESELECT BEGIN READ BURST READ BEGIN WRITE BURST WRITE WRITE READ READ DS DS WRITE READ BURST BURST WRITE READ WRITE READ BURST WRITE BURST DS BURST DS DS Command Operation DS Deselect Read New Read Write New Write Burst Burst Read, Burst Write or Continue Deselect Remarks 1. States change on the rising edge of the clock. 2. A Stall or Ignore Clock Edge cycle is not shown in the above diagram. This is because /CKE HIGH only blocks the clock (CLK) input and does not change the state of the device. |
Similar Part No. - UPD4481182GF-A44 |
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Similar Description - UPD4481182GF-A44 |
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