UPD4482182GF-C60Y datasheet(8/28 Pages) NEC

Part #	UPD4482182GF-C60Y

Description	8M-BIT CMOS SYNCHRONOUS FAST SRAM PIPELINED OPERATION SINGLE CYCLE DESELECT

Download	28 Pages

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Manufacturer	NEC [NEC]

Direct Link	http://www.nec.com/

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Data Sheet M14522EJ3V0DS

µPD4482162, 4482182, 4482322, 4482362

[

µµµµPD4482322, µµµµPD4482362]

Address

Registers

Binary

Counter

and Logic

CLR

Q0

Q1

Byte 1

Write Register

Byte 1

Write Driver

8/9

Byte 2

Write Register

Byte 2

Write Driver

8/9

Byte 3

Write Register

Byte 3

Write Driver

8/9

Byte 4

Write Register

Byte 4

Write Driver

8/9

Enable

Register

Row and Column

Memory cell array

1,024 rows

256

× 32 columns

(8,388,608 bits)

256

× 36 columns

(9,437,184 bits)

Output

Registers

Output

Buffers

Input

Registers

32/36

16

18

A0, A1

A1’

A0’

32/36

4

32/36

A0 to A17

MODE

/ADV

CLK

/AC

/AP

/BW1

/BW2

/BW3

/BW4

/BWE

/GW

/CE

CE2

/CE2

/G

I/O1 to I/O32

I/OP1 to I/OP4

Enable delay

Register

ZZ

Power Down Control

Decoders

18

[

µµµµPD4482322, µµµµPD4482362]

Interleaved Burst Sequence Table (MODE = VDD)

External Address

A17 to A2, A1, A0

1st Burst Address

A17 to A2, A1, /A0

2nd Burst Address

A17 to A2, /A1, A0

3rd Burst Address

A17 to A2, /A1, /A0

Linear Burst Sequence Table (MODE = VSS)

External Address

A17 to A2, 0, 0

A17 to A2, 0, 1

A17 to A2, 1, 0

A17 to A2, 1, 1

1st Burst Address

A17 to A2, 0, 1

A17 to A2, 1, 0

A17 to A2, 1, 1

A17 to A2, 0, 0

2nd Burst Address

A17 to A2, 1, 0

A17 to A2, 1, 1

A17 to A2, 0, 0

A17 to A2, 0, 1

3rd Burst Address

A17 to A2, 1, 1

A17 to A2, 0, 0

A17 to A2, 0, 1

A17 to A2, 1, 0

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UPD4482182GF-C60Y Datasheet(PDF) 8 Page - NEC

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