A43E06161V-95F datasheet(6/46 Pages) AMICC

Part #	A43E06161V-95F

Description	512K X 16 Bit X 2 Banks Synchronous DRAM

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Manufacturer	AMICC [AMIC Technology]

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A43E06161

PRELIMINARY

(July, 2005, Version 0.1)

5

AMIC Technology, Corp.

Decoupling Capacitance Guide Line

Recommended decoupling capacitance added to power line at board.

Parameter

Symbol

Value

Unit

Decoupling Capacitance between VDD and VSS

CDC1

0.1 + 0.01

µF

Decoupling Capacitance between VDDQ and VSSQ

CDC2

0.1 + 0.01

µF

Note:

1. VDD and VDDQ pins are separated each other.

All VDD pins are connected in chip. All VDDQ pins are connected in chip.

2. VSS and VSSQ pins are separated each other

All VSS pins are connected in chip. All VSSQ pins are connected in chip.

DC Electrical Characteristics

(Recommended operating condition unless otherwise noted, TA = 0 to 70

°C or -40ºC to +85ºC)

Speed

Symbol

Parameter

Test Conditions

CAS

Latency

-75

-95

Unit

Notes

Icc1

Operating Current

(One Bank Active)

Burst Length = 1

tRC

≥ tRC(min), tCC ≥ tCC(min), IOL = 0mA

20

mA

1

Icc2 P

CKE

≤ VIL(max), tCC = 15ns

0.3

Icc2 PS

Precharge Standby

Current in power-

down mode

CKL

≤ VIL(max), tCC = ∞

0.1

mA

ICC2N

CKE

≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

5

ICC2NS

Precharge Standby

Current in non

power-down mode

CKE

≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable.

2

mA

ICC3 P

Active Standby

Current in power-

down mode

CKE

≤ VIL(max), tCC = 15ns

2

mA

ICC3N

Active Standby

current in non

power-down mode

(One Bank Active)

CKE

≥ VIH(min), CS ≥ VIH(min), tCC = 15ns

Input signals are changed one time during 30ns

10

mA

ICC4

Operating Current

(Burst Mode)

IOL = 0mA, Page Burst

All bank Activated, tCCD = tCCD (min)

20

mA

1

ICC5

Refresh Current

tRC

≥ tRC (min)

20

mA

2

ICC6

Self Refresh

Current

CKE

≤ 0.2V

200

µA

ICC7

Deep Power Down

Current

CKE

≤ 0.2V

10

µA

Note:

1. Measured with outputs open. Addresses are changed only one time during tCC(min).

2. Refresh period is 32ms. Addresses are changed only one time during tCC(min).

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