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A43L8316AV-5.5 Datasheet(PDF) 9 Page - AMIC Technology |
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A43L8316AV-5.5 Datasheet(HTML) 9 Page - AMIC Technology |
9 / 45 page A43L8316A (September, 2003, Version 1.0) 8 AMIC Technology, Corp. Operating AC Parameter (AC operating conditions unless otherwise noted) Version Symbol Parameter CAS Latency -5 -5.5 -6 -7 Unit Note 3 tRRD(min) Row active to row active delay 2 2 2 2 2 CLK 1 3 3 3 3 3 tRCD(min) RAS to CAS delay 2 - - - 2 CLK 1 3 3 3 3 3 tRP(min) Row precharge time 2 - - - 2 CLK 1 3 8 8 7 6 tRAS(min) 2 - - - 5 CLK 1 3 tRAS(max) Row active time 2 100 µs 3 11 11 10 9 tRC(min) Row cycle time 2 - - - 7 CLK 1 3 tCDL(min) Last data in new col. Address delay 2 1 CLK 2 3 2 2 2 2 tRDL(min) Last data in row precharge 2 - - - 2 CLK 2 3 tBDL(min) Last data in to burst stop 2 1 CLK 2 3 tCCD(min) Col. Address to col. Address delay 2 1 CLK 3 2 CLK 4 Number of valid output data 2 1 CLK Note: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher integer. 2. Minimum delay is required to complete write. 3. All parts allow every cycle column address change. 4. In case of row precharge interrupt, auto precharge and read burst stop. |
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