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A43P26161G-75U Datasheet(PDF) 7 Page - AMIC Technology

Part # A43P26161G-75U
Description  1M X 16 Bit X 4 Banks Low Power Synchronous DRAM
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A43P26161G-75U Datasheet(HTML) 7 Page - AMIC Technology

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A43P26161
PRELIMINARY
(July, 2005, Version 1.1)
6
AMIC Technology, Corp.
AC Operating Test Conditions
(VDD = 2.3V~2.7V, TA = 0ºC to +70ºC for commercial or TA =-40ºC to +85ºC for extended)
Parameter
Value
Unit
AC input levels
0.9 x VDDQ/0.2
V
Input timing measurement reference level
0.5 x VDDQ
V
Input rise and all time (See note3)
tr/tf = 1/1
ns
Output timing measurement reference level
0.5 x VDDQ
V
Output load condition
See Fig.2
Output
500
500
(Fig. 1) DC Output Load Circuit
ZO=50
OUTPUT
50
VTT =0.5V x VDDQ
30pF
(Fig. 2) AC Output Load Circuit
VDDQ
30pF
VOH(DC) = VDDQ-0.2V, IOH = -0.1mA
VOL(DC) = 0.2V, IOL = 0.1mA
AC Characteristics
(AC operating conditions unless otherwise noted)
-75
-95
Symbol
Parameter
Min
Max
Min
Max
Unit
Note
CL=3
7.5
9.5
tCC
CLK cycle time
CL=2
12
1000
15
1000
ns
1
CL=3
-
6
-
7
tSAC
CLK to valid
Output delay
CL=2
-
9
-
8
ns
1,2
tOH
Output data hold time
2.5
-
2.5
-
ns
2
CL=3
3
-
3.5
-
tCH
CLK high pulse width
CL=2
3
-
3.5
-
ns
3
CL=3
3
-
3.5
-
tCL
CLK low pulse width
CL=2
3
-
3.5
-
ns
3
CL=3
2
-
2
-
tSS
Input setup time
CL=2
2
-
2
-
ns
3
tSH
Input hold time
1.5
-
1.5
-
ns
3
tSLZ
CLK to output in Low-Z
1
-
1
-
ns
2
CL=3
-
6
-
7
tSHZ
CLK to output in Hi-Z
CL=2
-
8
-
8
ns
CL=CAS Latency.
*All AC parameters are measured from half to half.
Note :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e.,
[(tr + tf)/2-1]ns should be added to the parameter.


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