Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

A82DL3224TG-70IF Datasheet(PDF) 11 Page - AMIC Technology

Part # A82DL3224TG-70IF
Description  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL32x4T(U) 32 Megabit (4Mx8 Bit/2Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
Download  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

A82DL3224TG-70IF Datasheet(HTML) 11 Page - AMIC Technology

Back Button A82DL3224TG-70IF Datasheet HTML 7Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 8Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 9Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 10Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 11Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 12Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 13Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 14Page - AMIC Technology A82DL3224TG-70IF Datasheet HTML 15Page - AMIC Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 60 page
background image
A82DL32x4T(U) Series
PRELIMINARY
(August, 2005, Version 0.0)
10
AMIC Technology, Corp.
Word/Byte Configuration
The BYTE_F pin determines whether the I/O pins I/O15-I/O0
operate in the byte or word configuration. If the BYTE_F pin
is set at logic ”1”, the device is in word configuration, I/O15-
I/O0 are active and controlled by CE_F and OE .
If the BYTE_F pin is set at logic “0”, the device is in byte
configuration, and only I/O0-I/O7 are active and controlled by
CE_F and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is
used as an input for the LSB(A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive
the CE_F and OE pins to VIL. CE_F is the power control
and selects the device.
OE is the output control and gates
array data to the output pins.
WE should remain at VIH. The
BYTE_F pin determines whether the device outputs array
data in words or bytes.
The internal state machine is set for reading array data upon
device power-up, or after a hardware reset. This ensures that
no spurious alteration of the memory content occurs during
the power transition. No command is necessary in this mode
to obtain array data. Standard microprocessor read cycles
that assert valid addresses on the device address inputs
produce valid data on the device data outputs. Each bank
remains enabled for read access until the command register
contents are altered.
See "Requirements for Reading Array Data" for more
information. Refer to the AC Read-Only Operations table for
timing specifications and to Figure 11 for the timing
waveform, lCC1_F in the DC Characteristics table represents
the active current specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which includes
programming data to the device and erasing sectors of
memory), the system must drive
WE and CE_F to VIL, and
OE to VIH.
For program operations, the BYTE_F pin determines
whether the device accepts program data in bytes or words,
Refer to “Word/Byte Configuration” for more information.
The device features an Unlock Bypass mode to facilitate
faster programming. Once a bank enters the Unlock Bypass
mode, only two write cycles are required to program a word
or byte, instead of four. The “Word / Byte Program Command
Sequence” section has details on programming data to the
device using both standard and Unlock Bypass command
sequence.
An erase operation can erase one sector, multiple sectors, or
the entire device. The Sector Address Tables 3-4 indicate the
address range that each sector occupies. The device
address space is divided into two banks: Bank 1 contains the
boot/parameter sectors, and Bank 2 contains the larger, code
sectors of uniform size. A “bank address” is the address bits
required to uniquely select a bank. Similarly, a “sector
address” is the address bits required to uniquely select a
sector.
ICC2_F in the DC Characteristics table represents the active
current
specification
for
the
write
mode.
The
"AC
Characteristics" section contains timing specification tables
and timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program operations through
the ACC function. This is one of two functions provided by
the WP /ACC pin. This function is primarily intended to allow
faster manufacturing throughput at the factory.
If the system asserts VHH on this pin, the device automatically
enters the aforementioned Unlock Bypass mode, temporarily
unprotects any protected sectors, and uses the higher
voltage on the pin to reduce the time required for program
operations. The system would use a two-cycle program
command sequence as required by the Unlock Bypass
mode. Removing VHH from the WP /ACC pin returns the
device to normal operation. Note that the WP /ACC pin must
not be at VHH for operations other than accelerated program-
ming, or device damage may result. In addition, the
WP /ACC pin must not be left floating or unconnected;
inconsistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command sequence, the
device enters the autoselect mode. The system can then
read autoselect codes from the internal register (which is
separate from the memory array) on I/O7-I/O0. Standard read
cycle timings apply in this mode. Refer to the Autoselect
Mode and Autoselect Command Sequence sections for more
information.
Simultaneous Read/Write Operations with Zero
Latency
This device is capable of reading data from one bank of
memory while programming or erasing in the other bank of
memory. An erase operation may also be suspended to read
from or program to another location within the same bank
(except the sector being erased). Figure 18 shows how read
and write cycles may be initiated for simultaneous operation
with zero latency. ICC6_F and ICC7_F in the DC Characteristics
table represent the current specifications for read-while-pro-
gram and read-while-erase, respectively.
Standby Mode
When the system is not reading or writing to the device, it
can place the device in the standby mode. In this mode,
current consumption is greatly reduced, and the outputs are
placed in the high impedance state, independent of the
OE
input.
The device enters the CMOS standby mode when the
CE_F & RESET pins are both held at VCC_F ± 0.3V. (Note
that this is a more restricted voltage range than VIH.) If
CE_F and RESET are held at VIH, but not within VCC_F ±
0.3V, the device will be in the standby mode, but the standby
current will be greater. The device requires the standard
access time (tCE) for read access when the device is in either
of these standby modes, before it is ready to read data.
If the device is deselected during erasure or programming,
the device draws active current until the operation is
completed.
ICC3_F in the DC Characteristics tables represent the standby
current specification.


Similar Part No. - A82DL3224TG-70IF

ManufacturerPart #DatasheetDescription
logo
AMIC Technology
A82DL1622 AMICC-A82DL1622 Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
A82DL1622TG-70 AMICC-A82DL1622TG-70 Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
A82DL1622TG-70F AMICC-A82DL1622TG-70F Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
A82DL1622TG-70I AMICC-A82DL1622TG-70I Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
A82DL1622TG-70IF AMICC-A82DL1622TG-70IF Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
More results

Similar Description - A82DL3224TG-70IF

ManufacturerPart #DatasheetDescription
logo
AMIC Technology
A82DL16X2T AMICC-A82DL16X2T Datasheet
883Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only, Simultaneous Operation Flash
logo
SPANSION
AM49DL32XBG SPANSION-AM49DL32XBG Datasheet
1Mb / 64P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
AM49DL320BG SPANSION-AM49DL320BG Datasheet
1Mb / 64P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous
logo
AMIC Technology
A82DL16X4T AMICC-A82DL16X4T Datasheet
896Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
logo
SPANSION
S71PL129JC0 SPANSION-S71PL129JC0_06 Datasheet
3Mb / 153P
   Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM 128 Megabit (8M x 16-bit) CMOS3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory
MB84VD2118XEM-70 SPANSION-MB84VD2118XEM-70 Datasheet
872Kb / 52P
   Stacked MCP (Multi-Chip Package) FLASH MEMORY & SRAM CMOS
logo
Advanced Micro Devices
DS42553 AMD-DS42553 Datasheet
955Kb / 58P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
logo
SPANSION
AM41DL3208G SPANSION-AM41DL3208G Datasheet
1Mb / 65P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
AM42DL6404G SPANSION-AM42DL6404G Datasheet
1,020Kb / 61P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
logo
Advanced Micro Devices
DS42515 AMD-DS42515 Datasheet
830Kb / 57P
   Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com