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X79001V20I Datasheet(PDF) 4 Page - Intersil Corporation |
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X79001V20I Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 18 page 4 FN8147.0 March 17, 2005 ABSOLUTE MAXIMUM RATINGS All voltages are referred to Vss Temperature under bias ........................ -40°C to 85°C Storage temperature ......................... -65°C to +150°C Voltage on every pin except Vcc ............. -0.5V to +7V Voltage on Vcc Pin .....................................-0.5V to 6V D.C. Output Current at pins SO and RDY............ 5 mA D.C. Output Current at pins VL, VH, VFB, Vout and Vref ............................. -0.50 to 1 mA VBUF output short circuit duration............. 10 seconds Lead temperature (soldering, 10 seconds) ........ 300°C COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or an other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all typical values are for 25°C ambient temperature and 5V at pin Vcc. Maximum and minimum specifications are over the recommended operating conditions. All voltages are referred to the voltage at pin Vss. All bits in control registers are “0”. SPI interface in “standby” (see notes 1 and 2 on page 6). Output pins unloaded. Input pins floating. DAC input is 000hex.) Parameter Min. Max. Units Temperature -40 +85 °C Voltage on Vcc Pin 4.5 5.5 V Voltage on any other Pin -0.3 Vcc +0.3 V Parameter Min Typ Max Units Notes Buffered DAC and Reference Resolution 12 bit INL ±10 LSB (1)(2)(3) VL = 0.151V, VH = 3.025V DNL -0.5 0.5 LSB Total Offset Error 12 mV (1)(2)(4) VL = 0.151V, VH = 3.025V Total Fullscale Error 22 mV Total Offset Error Drift 50 ppm/°C (1)(2)(4) VL = 0.151V, VH = 3.025V Total Fullscale Error Drift 50 ppm/°C Settling time to 1 LSB 2 10 µs Step size ≤ 100mV (2)(5) 6 30 µs Step size up to full scale (2)(5) Buffer Only Output Buffer Offset -6 6 mV 150mV < Vout < VCC - 150mV Output Buffer Offset Drift -20 20 µV/°C (5) DC PSRR -1.5 +1.5 mV/V (5) Vbuf output slew rate 0.2 V/µs Output Buffer 3dB Bandwidth 300 1000 kHz 150mV < (V(VFB) = V(Vbuf)) < VCC – 150mV (5) Digital feed through 10 nV•sec (6) Output load regulation -1 1 mV/mA 140mV ≤ V(Vbuf) ≤ V CC-140mV I(Vbuf) = ±1mA Short circuit current @ Vbuf 50 mA V(Vbuf) = VCC or 0V Capacitive Loading Stability 100 pF Rload ≥ 2kΩ (5) X79000, X79001, X79002 |
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