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KMM5328000CKG Datasheet(PDF) 5 Page - Samsung semiconductor |
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KMM5328000CKG Datasheet(HTML) 5 Page - Samsung semiconductor |
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5 / 15 page  DRAM MODULE KMM5328100CK/CKG KMM5328000CK/CKG Test condition : Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V, Output loading CL=100pF Parameter Symbol -5 -6 Unit Note Min Max Min Max Access time from CAS precharge tCPA 30 35 ns 3 Fast page mode cycle time tPC 35 40 ns CAS precharge time(Fast page cycle) tCP 10 10 ns RAS pulse width(Fast page cycle) tRASP 50 200K 60 200K ns W to RAS precharge time(C-B-R refresh) tWRP 10 10 ns W to RAS hold time(C-B-R refresh) tWRH 10 10 ns CAS precharge(C-B-R counter test) tCPT 20 20 ns AC CHARACTERISTICS (0 °C≤TA≤70°C, VCC=5.0V±10%. See notes 1,2.) NOTES An initial pause of 200us is required after power-up followed by any 8 RAS-only or CAS-before-RAS refresh cycles before proper device operation is achieved. VIH(min) and VIL(max) are reference levels for measuring timing of input signals. Transition times are measured between VIH(min) and VIL(max) and are assumed to be 5ns for all inputs. Measured with a load equivalent to 2 TTL loads and 100pF. Operation within the tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD is greater than the specified tRCD(max) limit, then access time is controlled exclusively by tCAC. Assumes that tRCD ≥tRCD(max). This parameter defines the time at which the output achieves the open circuit condition and is not referenced to VOH or VOL. tWCS is non-restrictive operating parameter. It is included in the data sheet as electrical characteristics only. If tWCS ≥tWCS(min), the cycle is an early write cycle and the data out pin will remain high impedance for the duration of the cycle. Either tRCH or tRRH must be satisfied for a read cycle. These parameter are referenced to the CAS leading edge in early write cycles. Operation within the tRAD(max) limit insures that tRAC(max) can be met. tRAD(max) is specified as reference point only. If tRAD is greater than the specified tRAD(max) limit, then access time is controlled by tAA. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. |
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