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Preliminary data sheet

Rev. 01 — 3 October 2005

11 of 38

Philips Semiconductors

LPC2141/42/44/46/48

Single-chip 16-bit/32-bit microcontrollers

[1]

5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.

[2]

5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control. If configured for an input

function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns.

[3]

functionality.

[4]

5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured

for an input function, this pad utilizes built-in glitch filter that blocks pulses shorter than 3 ns. When configured as an ADC input, digital

section of the pad is disabled.

[5]

5 V tolerant pad providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog output function. When

configured as the DAC output, digital section of the pad is disabled.

[6]

5 V tolerant pad with built-in pull-up resistor providing digital I/O functions with TTL levels and hysteresis and 10 ns slew rate control.

The pull-up resistor’s value typically ranges from 60 k

Ω to 300 kΩ.

[7]

Pad is designed in accordance with the Universal Serial Bus (USB) specification, revision 2.0 (Full-speed and Low-speed mode only).

[8]

5 V tolerant pad providing digital input (with TTL levels and hysteresis) function only.

[9]

Pad provides special analog functionality.

P1.28/TDI

60 [6]

I/O

P1.28 — General purpose input/output digital pin (GPIO).

I

TDI — Test Data in for JTAG interface.

P1.29/TCK

56 [6]

I/O

P1.29 — General purpose input/output digital pin (GPIO).

I

TCK — Test Clock for JTAG interface.

P1.30/TMS

52 [6]

I/O

P1.30 — General purpose input/output digital pin (GPIO).

I

TMS — Test Mode Select for JTAG interface.

P1.31/TRST

20 [6]

I/O

P1.31 — General purpose input/output digital pin (GPIO).

I

TRST — Test Reset for JTAG interface.

D+

10 [7]

I/O

USB bidirectional D+ line.

D

−

11 [7]

I/O

USB bidirectional D

− line.

RESET

57 [8]

I

External reset input: A LOW on this pin resets the device, causing I/O ports

and peripherals to take on their default states, and processor execution to

begin at address 0. TTL with hysteresis, 5 V tolerant.

XTAL1

62 [9]

I

Input to the oscillator circuit and internal clock generator circuits.

XTAL2

61 [9]

O

Output from the oscillator amplifier.

RTXC1

3 [9]

I

Input to the RTC oscillator circuit.

RTXC2

5 [9]

O

Output from the RTC oscillator circuit.

6, 18, 25, 42,

50

I

Ground: 0 V reference.

59

I

Analog ground: 0 V reference. This should nominally be the same voltage

23, 43, 51

I

3.3 V power supply: This is the power supply voltage for the core and I/O

ports.

7I

Analog 3.3 V power supply: This should be nominally the same voltage as

used to power the on-chip ADC(s) and DAC.

VREF

63

I

A/D converter reference voltage: This should be nominally less than or

Level on this pin is used as a reference for ADC(s) and DAC.

VBAT

49

I

RTC power supply voltage: 3.3 V on this pin supplies the power to the RTC.

Table 3:

Symbol

Pin

Type

Description