Programmable Microelectronics Corp.

Issue Date: March, 2001 Rev: 1.0

PMC

Pm29F002

COMMAND DEFINITION

8

Table 4. Software Command Definition

d

n

a

m

m

o

C

e

c

n

e

u

q

e

S

s

u

B

e

l

c

y

C

s

u

B

t

s

1

e

l

c

y

C

a

t

a

D

r

d

d

A

s

u

B

d

n

2

e

l

c

y

C

a

t

a

D

r

d

d

A

s

u

B

d

r

3

e

l

c

y

C

a

t

a

D

r

d

d

A

s

u

B

h

t

4

e

l

c

y

C

a

t

a

D

r

d

d

A

s

u

B

h

t

5

e

c

l

y

C

a

t

a

D

r

d

d

A

s

u

B

h

t

6

e

l

c

y

C

a

t

a

D

r

d

d

A

d

a

e

R1

D

r

d

d

A

T

U

O

e

s

a

r

E

p

i

h

C6

h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

8

h

5

5

5h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

1

h

5

5

5

e

s

a

r

E

k

c

o

l

B6

h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

8

h

5

5

5h

A

A

h

5

5

5h

5

5

h

A

A

2A

B

)

1

(

h

0

3

e

t

y

B

m

a

r

g

o

r

P

4h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

A

h

5

5

5D

r

d

d

A

N

I

k

c

o

l

B

t

o

o

B

t

u

o

k

c

o

L

)

3

,

2

(

6h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

8

h

5

5

5h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

4

h

5

5

5

k

c

o

l

B

t

o

o

B

t

u

o

k

c

o

L

n

o

i

t

c

e

t

e

D

)

3

(

3h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

9

h

5

5

5

A

B

)

4

(

h

0

0

)

5

(

A

B

)

4

(

h

1

0

)

5

(

t

c

u

d

o

r

P

D

I

r

e

r

u

t

c

a

f

u

n

a

M

3h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

9

h

5

5

5h

D

9

h

0

0

X

e

c

i

v

e

D

t

c

u

d

o

r

P

)

t

o

o

B

p

o

T

(

D

I

3h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

9

h

5

5

5h

D

1

h

1

0

X

e

c

i

v

e

D

t

c

u

d

o

r

P

)

t

o

o

B

m

o

t

t

o

B

(

D

I

3h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

9

h

5

5

5h

D

2

h

1

0

X

D

I

t

c

u

d

o

r

P

t

i

x

E

)

6

(

3h

A

A

h

5

5

5h

5

5

h

A

A

2h

0

F

h

5

5

5

D

I

t

c

u

d

o

r

P

t

i

x

E

)

6

(

1h

0

F

h

X

X

X

Notes:

1. BA = Block address of the block to be erased.

2. When the boot block lockout feature is enabled, the boot block will not be erased when a chip erase

command or a block erase command for boot block erasure is issued. Once the boot block is not

protected, the boot block will be erased when a chip erase command or a block erase command for

boot block erasure is issued.

3. After completion of the boot block lockout enable or detection command, the Product ID Exit com-

mand must be issued to return to standard read mode.

4. BA = Block address of the boot block;

For top boot block location, A0 = “0”, A1 = “1”, and A14-A17 = “1” where A2-A13 = Don’t Care;

For bottom boot block location, A0 = “0”, A1 = “1”, and A14-A17 = “0” where A2-A13 = Don’t Care.

5. I/O0 = “1” means boot block lockout is enabled, I/O0 = “0” means boot block lockout is disabled.

6. Either one of the Product ID Exit command can be used.