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QS532807 Datasheet(PDF) 2 Page - Integrated Device Technology |
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QS532807 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 6 page 2 INDUSTRIALTEMPERATURERANGE QS532807 3.3V GUARANTEED LOW SKEW CMOS CLOCK DRIVER/BUFFER PIN CONFIGURATION QSOP/ SOIC TOP VIEW 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 IN GND O 1 GND V CC GND GND GND O 2 O 3 O 4 O 5 O 6 O 7 O 8 O 9 O 10 VCC VCC V CC SO 20-2 SO 20-8 ABSOLUTE MAXIMUM RATINGS (1) Symbol Description Max. Unit VTERM(2) Supply Voltage to Ground – 0.5 to +4.6 V DC Output Voltage VOUT – 0.5 to VCC+0.5 V VTERM(3) DC Input Voltage VIN – 0.5 to +7 V VAC AC Input Voltage (pulse width ≤20ns) -3 V IOUT DC Output Current VIN < 0 -20 mA DC Output Current Max. Sink Current/Pin 120 mA TSTG Storage Temperature – 65 to +150 °C TJ Junction Temperature 150 °C NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc Terminals. 3. All terminals except Vcc. CAPACITANCE (TA = +25OC, f = 1.0MHz, VIN = 0V) QSOP SOIC Pins Typ. Max. (1) Typ. Max. (1) Unit CIN 36 5 7 pF NOTE: 1. This parameter is guaranteed but not production tested. PIN DESCRIPTION Pin Names I/O Description IN I Clock Input Ox O Clock Outputs |
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