UC62LS4008GI datasheet(1/11 Pages) ETC1

Part #	UC62LS4008GI

Description	Low Power CMOS SRAM 512K X 8 Bits

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Low Power CMOS SRAM

512K X 8 Bits

UC62LS4008

-20/-25

Features:

• Vcc operation voltage :

3.0V ~ 3.6V

• Low power consumption :

20mA (Max.) operating current

2uA (Typ.) CMOS standby current

• High Speed Access time :

25ns (Max.) at Vcc = 3.0V

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Data retention supply voltage as low as 1.2V

• Easy expansion with CE\ and OE\ options

Description

The UC62LV2008 is a high performance, very low power

CMOS Static Random Access Memory organized as 524,288

words by 8 bits and operates from

3.0V to 3.6V supply

voltage. Advanced CMOS technology and circuit techniques

provide both high speed and low power features with a

typical CMOS standby current of 2uA and maximum access

time of 25ns in 3.0V operation.

Easy memory expansion is provided enable (CE\), and

active LOW output enable (OE\) and three-state output

drivers.

The UC62LS4008 has an automatic power down feature,

reducing the power consumption significantly when chip is

deselected.

The UC62LS4008 is available in the JEDEC standard 32

pin 450mil

Plastic SOP,

8mmx20.0mm

TSOP (type I),

and

8mmx13.4mm STSOP.

PRODUCT FAMILY

Power Consumption

Speed

(ns)

STANDBY

Operating

Product Family

Operating

Tempature

Vcc Range

Vcc=3.0V(Max.)

Vcc=3.3V(Typ.)

Vcc=3.6V(Max.)

Package

Type

UC62LS4008HC

TSOP-32

UC62LS4008FC

SOP-32

UC62LS4008GC

STSOP-32

UC62LS4008AC

0℃ ~ 70℃

3.0V ~ 3.6V

20/25

2uA

20mA

DICE

UC62LS4008HI

TSOP-32

UC62LS4008FI

SOP-32

UC62LS4008GI

STSOP-32

UC62LS4008AI

-40℃ ~ 85℃

3.0V ~ 3.6V

20/25

2uA

20mA

DICE

PIN CONFIGURATIONS

A14

1

A12

2

A7

3

A6

4

A5

5

A4

6

A3

7

A2

8

A1

9

A0

10

DQ0

11

DQ1

12

DQ2

13

GND

14

VCC

28

WE

27

A13

26

A8

25

A9

24

A11

23

OE

22

A10

21

CE

20

DQ7

19

DQ6

18

DQ5

17

DQ4

16

DQ3

15

11

12

13

14

16

15

CS62LS4008HC

29

30

31

32

CS62LS4008FI

A15

A17

A16

A18

CS62LS4008GI

1

2

3

4

5

6

7

8

9

10

A0

DQ0

DQ1

DQ2

GND

A14

A12

A7

A6

A5

A4

A3

A2

A1

A16

A18

VCC

WE

A13

A8

A9

A11

OE

A10

CE

DQ7

DQ6

DQ5

DQ4

DQ3

A15

A17

CS62LS4008FC

CS62LS4008HI

CS62LS4008GC

BLOCK DIAGRAM

MEMORY ARRAY

512K X 8 Bits

COLUMN DECODER

SENSE AMPLIFIER

&

WRITE DRIVER

I/O BUFFER

X8

COL

Address

ROW

Address

CE

WE

OE

CE

WE

OE

U-Chip Technology Corp. LTD.

.

Preliminary

Rev.1.0

Reserves the right to modify document contents without notice.

PAGE

1

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