MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

2–249

REV 5

3/93

Binary to 1-8 Decoder (Low)

The MC10H161 provides parallel decoding of a three bit binary word to one

of eight lines. The MC10H161 is useful in high–speed multiplexer/demultiplexer

applications.

The MC10H161 is designed to decode a three bit input word to one of eight

output lines. The MC10H161 output will be low when selected while all other

output are high. The enable inputs, when either or both are high, force all

outputs high.

The MC10H161 is a true parallel decoder. This eliminates unequal parallel

path delay times found in other decoder designs. These devices are ideally

suited for multiplexer/demultiplexer applications.

• Propagation Delay, 1.0 ns Typical

• Power Dissipation, 315 mW Typical (same as MECL 10K)

• Improved Noise Margin 150 mV (Over Operating Voltage and

Temperature Range)

• Voltage Compensated

• MECL 10K–Compatible

MAXIMUM RATINGS

Characteristic

Symbol

Rating

Unit

Power Supply (VCC = 0)

VEE

–8.0 to 0

Vdc

Input Voltage (VCC = 0)

VI

0 to VEE

Vdc

Output Current — Continuous

— Surge

Iout

50

100

mA

Operating Temperature Range

TA

0 to +75

°C

Storage Temperature Range — Plastic

— Ceramic

Tstg

–55 to +150

–55 to +165

°C

°C

ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%) (See Note)

0

°

25

°

75

°

Characteristic

Symbol

Min

Max

Min

Max

Min

Max

Unit

Power Supply Current

IE

—

84

—

76

—

84

mA

Input Current High

IinH

—

465

—

275

—

275

µA

Input Current Low

IinL

0.5

—

0.5

—

0.3

—

µA

High Output Voltage

VOH

–1.02

–0.84

–0.98

–0.81

–0.92

–0.735

Vdc

Low Output Voltage

VOL

–1.95

–1.63

–1.95

–1.63

–1.95

–1.60

Vdc

High Input Voltage

VIH

–1.17

–0.84

–1.13

–0.81

–1.07

–0.735

Vdc

Low Input Voltage

VIL

–1.95

–1.48

–1.95

–1.48

–1.95

–1.45

Vdc

AC PARAMETERS

Propagation Delay

Data

Enable

tpd

0.6

0.8

2.0

2.3

0.65

0.8

2.1

2.4

0.7

0.9

2.2

2.5

ns

Rise Time

tr

0.55

1.7

0.65

1.8

0.7

1.9

ns

Fall Time

tf

0.55

1.7

0.65

1.8

0.7

1.9

ns

NOTE:

Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,

after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit

board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through

a 50–ohm resistor to –2.0 volts.

MC10H161

LOGIC DIAGRAM

DIP

PIN ASSIGNMENT

VCC1

E0

Q3

Q2

Q1

Q0

A

VEE

VCC2

E1

C

Q4

Q5

Q6

Q7

B

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

VCC1 = Pin 1

VCC2 = Pin 16

VEE = Pin 8

E02

E115

A7

B9

C14

6Q0

5Q1

4Q2

3Q3

13 Q4

12 Q5

11 Q6

10 Q7

H

H

H

H

L

H

H

H

H

H

L

L

L

L

L

L

L

L

X

H

TRUTH TABLE

ENABLE

INPUTS

INPUTS

OUTPUTS

L

L

L

L

L

L

L

L

H

X

L

L

L

L

H

H

H

H

X

X

L

L

H

H

L

L

H

H

X

X

L

H

L

H

L

H

L

H

X

X

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

L

H

H

H

H

H

H

H

H

H

H

L

H

H

Q4

E0

E1

C

B

A Q0 Q1 Q2 Q3

Q5 Q6 Q7

L SUFFIX

CERAMIC PACKAGE

CASE 620–10

P SUFFIX

PLASTIC PACKAGE

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

Tables on page 6–11 of the Motorola MECL Data

Book (DL122/D).