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EBE11UD8AEFA Datasheet(PDF) 11 Page - Elpida Memory |
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EBE11UD8AEFA Datasheet(HTML) 11 Page - Elpida Memory |
11 / 22 page EBE11UD8AEFA Data Sheet E0586E30 (Ver. 3.0) 11 DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V) Parameter Symbol Grade max. Unit Test condition Operating current (ACT-PRE) (Another rank is in IDD2P) IDD0 -5C -4A 960 824 mA Operating current (ACT-PRE) (Another rank is in IDD3N) IDD0 -5C -4A 1400 1240 mA one bank; tCK = tCK (IDD), tRC = tRC (IDD), tRAS = tRAS min.(IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING Operating current (ACT-READ-PRE) (Another rank is in IDD2P) IDD1 -5C -4A 1080 944 mA Operating current (ACT-READ-PRE) (Another rank is in IDD3N) IDD1 -5C -4A 1520 1360 mA one bank; IOUT = 0mA; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRC = tRC (IDD), tRAS = tRAS min.(IDD); tRCD = tRCD (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data pattern is same as IDD4W -5C -4A 160 Precharge power-down standby current IDD2P -5C -4A 128 mA all banks idle; tCK = tCK (IDD); CKE is L; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING -5C 400 Precharge quiet standby current IDD2Q -4A 320 mA all banks idle; tCK = tCK (IDD); CKE is H, /CS is H; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING -5C 480 Idle standby current IDD2N -4A 400 mA all banks idle; tCK = tCK (IDD); CKE is H, /CS is H; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING -5C 640 IDD3P-F -4A 560 mA Fast PDN Exit MRS(12) = 0 -5C 400 Active power-down standby current IDD3P-S -4A 320 mA all banks open; tCK = tCK (IDD); CKE is L; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING Slow PDN Exit MRS(12) = 1 -5C 1040 Active standby current IDD3N -4A 960 mA all banks open; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING Operating current (Burst read operating) (Another rank is in IDD2P) IDD4R -5C -4A 1600 1264 mA Operating current (Burst read operating) (Another rank is in IDD3N) IDD4R -5C -4A 2040 1680 mA all banks open, continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data pattern is same as IDD4W Operating current (Burst write operating) (Another rank is in IDD2P) IDD4W -5C -4A 1600 1264 mA Operating current (Burst write operating) (Another rank is in IDD3N) IDD4W -5C -4A 2040 1680 mA all banks open, continuous burst writes; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING Auto-refresh current (Another rank is in IDD2P) IDD5 -5C -4A 2080 1904 mA Auto-refresh current (Another rank is in IDD3N) IDD5 -5C -4A 2520 2320 mA tCK = tCK (IDD); Refresh command at every tRFC (IDD) interval; CKE is H, /CS is H between valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING |
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