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UPD45128163-I Datasheet(PDF) 6 Page - Elpida Memory |
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UPD45128163-I Datasheet(HTML) 6 Page - Elpida Memory |
6 / 86 page Data Sheet E0346N10 (Ver. 1.0) 6 µµµµPD45128163-I CONTENTS 1. Input / Output Pin Function ............................................................................................................. 8 2. Commands ........................................................................................................................................ 9 3. Simplified State Diagram ............................................................................................................... 12 4. Truth Table ...................................................................................................................................... 13 4.1 Command Truth Table ............................................................................................................................ 13 4.2 DQM Truth Table ..................................................................................................................................... 13 4.3 CKE Truth Table ...................................................................................................................................... 13 4.4 Operative Command Table .................................................................................................................... 14 4.5 Command Truth Table for CKE ............................................................................................................. 17 5. Initialization ..................................................................................................................................... 18 6. Programming the Mode Register .................................................................................................. 19 7. Mode Register ................................................................................................................................. 20 7.1 Burst Length and Sequence ................................................................................................................. 21 8. Address Bits of Bank-Select and Precharge ................................................................................ 24 9. Precharge ........................................................................................................................................ 23 10. Auto Precharge ............................................................................................................................... 24 10.1 Read with Auto Precharge .................................................................................................................. 24 10.2 Write with Auto Precharge ................................................................................................................. 25 11. Read / Write Command Interval .................................................................................................... 26 11.1 Read to Read Command Interval ....................................................................................................... 26 11.2 Write to Write Command Interval ....................................................................................................... 26 11.3 Write to Read Command Interval ....................................................................................................... 27 11.4 Read to Write Command Interval ....................................................................................................... 28 12. Burst Termination ........................................................................................................................... 29 12.1 Burst Stop Command ......................................................................................................................... 29 12.2 Precharge Termination ....................................................................................................................... 30 12.2.1 Precharge Termination in READ Cycle ................................................................................... 30 12.2.2 Precharge Termination in WRITE Cycle ................................................................................. 31 |
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