K6R1004V1C-P20 datasheet(5/9 Pages) SAMSUNG

Part #	K6R1004V1C-P20

Description	256Kx4 Bit (with OE) High-Speed CMOS Static RAM(3.3V Operating).

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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PRELIMINARY

Revision 2.0

- 5 -

April 2000

CCPCCCRCELIMINARY

Preliminary

PRELIMINARY

K6R1004V1C-C/C-L, K6R1004V1C-I/C-P

CMOS SRAM

Address

Data Out

Previous Valid Data

Valid Data

TIMMING DIAGRAMS

TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)

tAA

tRC

tOH

TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)

CS

Address

OE

Data out

tAA

tOLZ

tLZ(4,5)

tOH

tOHZ

tRC

tOE

tCO

tPU

tPD

tHZ(3,4,5)

50%

VCC

Current

ICC

ISB

Valid Data

WRITE CYCLE*

* The above parameters are also guaranteed at industrial temperature range.

Parameter

Sym-

bol

K6R1004V1C-10

K6R1004V1C-12

K6R1004V1C-15

K6R1004V1C-20

Unit

Min

Max

Min

Max

Min

Max

Min

Max

Write Cycle Time

tWC

10

-

12

-

15

-

20

-

ns

Chip Select to End of Write

tCW

7

-

8

-

9

-

10

-

ns

Address Set-up Time

tAS

0

-

0

-

0

-

0

-

ns

Address Valid to End of Write

tAW

7

-

8

-

9

-

10

-

ns

Write Pulse Width(OE High)

tWP

7

-

8

-

9

-

10

-

ns

Write Pulse Width(OE Low)

tWP1

10

-

12

-

15

-

20

-

ns

Write Recovery Time

tWR

0

-

0

-

0

-

0

-

ns

Write to Output High-Z

tWHZ

0

5

0

6

0

7

0

9

ns

Data to Write Time Overlap

tDW

5

-

6

-

7

-

8

-

ns

Data Hold from Write Time

tDH

0

-

0

-

0

-

0

-

ns

End Write to Output Low-Z

tOW

3

-

3

-

3

-

3

-

ns

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