UPA821TF

NPN SILICON EPITAXIAL

TWIN TRANSISTOR

•

LOW NOISE:

•

HIGH GAIN:

•

SMALL PACKAGE STYLE:

2 NE856 die in a 2 mm x 1.25 mm x 0.6 mm package

FEATURES

DESCRIPTION

The UPA821TF has two built-in low-voltage transistors which

are designed for low-noise amplification in the VHF to UHF

band. The two die are chosen from adjacent locations on the

wafer. These features combined with the pin configuration

make this device ideal for balanced or mirrored applications.

Low noise figures, high gain, and high current capability equate

to wide dynamic range and excellent linearity. The thinner

package style allows for higher density designs.

PRELIMINARY DATA SHEET

PART NUMBER

UPA821TF

PACKAGE OUTLINE

TS06

SYMBOLS

PARAMETERS AND CONDITIONS

UNITS

MIN

TYP

MAX

µA

1.0

µA

1.0

70

140

GHz

3.0

4.5

Cre

pF

0.7

1.5

dB

7

9

NF

dB

1.2

2.5

0.85

1.0

Notes: 1. Pulsed measurement, pulse width

≤ 350 µs, duty cycle ≤ 2 %.

2. Collector to base capacitance when measured with capacitance meter (automatic balanced bridge method), with

emitter connected to guard pin of capacitance meter.

California Eastern Laboratories

2.1

± 0.1

1.25

± 0.1

0 ~ 0.1

0.13

± 0.05

0.6

± 0.1

2.0

± 0.2

0.65

1.3

1

2

3

4

5

6

0.22

(All Leads)

+0.10

- 0.05

0.45

Package Outline TS06

PIN CONNECTIONS

1. Collector (Q1)

2. Emitter (Q1)

3. Collector (Q2)

4. Base (Q2)

5. Emitter (Q2)

6. Base (Q1)

Note:

Pin 3 is identified with a circle on the bottom of the package.

B1

E2

B2

C1

E1

C2

65

4

1

Q1

Q2

23