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IDT70V5378S166BC Datasheet(PDF) 8 Page - Integrated Device Technology |
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IDT70V5378S166BC Datasheet(HTML) 8 Page - Integrated Device Technology |
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8 / 29 page  8 IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Industrial and Commercial Temperature Ranges CLK MRST CNTRST MKLD CNTLD CNTINC CNTRD MKRD Mode Operation X L XXX XXX Master- Reset Counter/Address Register Reset and Mask Register Set (resets chip as per reset state definition) ↑ H L X X X X X Reset Counter/Address Register Reset ↑ H H L X X X X Load Load of Address Lines into Mask Register ↑ H H H L X X X Load Load of Address Lines into Counter/Address Register ↑ HHHH L X X Increment Counter Increment ↑ H XXX X L X Read- back Readback Counter on Address Lines ↑ H XXX X H L Read- back Readback Mask Register on Address Lines ↑ HH H(3) H H X X Hold Counter Hold 5649 tbl 05 Address Counter and Counter-Mask Control Operational Table (Any Port)(1,2) NOTES: 1. "X" = "don't care", "H" = VIH, "L" = VIL. 2. Counter operation and mask register operation is independent of Chip Enable. 3. MKLD = VIL will also hold the counter. Please refer to Truth Table II. RecommendedOperating Temperature and Supply Voltage(1) NOTES: 1. This is the parameter TA. This is the "instant on" case temperature. Symbol Parameter Min. Typ. Max. Unit VDD Supply Voltage 3.15 3.3 3.45 V VSS Ground 0 0 0 V VIH Input High Voltage (Address, Control & I/O Inputs) 2.0 ____ VDD + 150mV(2) V VIL Input Low Voltage -0.3(1) ____ 0.8 V 5649 tbl 07 Recommended DC Operating Conditions NOTES: 1. Undershoot of VIL > -1.5V for pulse width less than 10ns is allowed. 2. VTERM must not exceed VDD + 150mV. Grade Ambient Temperature GND VDD Commercial 0OC to +70OC0V 3.3V + 150mV Industrial -40OC to +85OC0V 3.3V + 150mV 5649 tbl 06 |
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