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SC91650 Datasheet(PDF) 8 Page - Silan Microelectronics Joint-stock |
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SC91650 Datasheet(HTML) 8 Page - Silan Microelectronics Joint-stock |
8 / 30 page Silan Semiconductors SC91650/1/2 A/B HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD REV: 1.0 2001.01.15 8 PIN DESCRIPTION Pin No. 650A/B 651A/B 652A/B Pin Name Description 12 12 12 C1 23 23 23 C2 34 34 34 C3 45 45 45 C4 56 56 56 C5 15 18 15 18 15 18 R1 16 19 16 19 16 19 R2 17 20 17 20 17 20 R3 18 21 18 21 18 21 R4 *Provides keyboard scanning. a. Dialling option: *The resistor connection between selected Row (or Column) and Vss may select most countries telecom specification. R=820k R1 R2 R3 R4 C4 C3 C2 C1 b. Keyboard scanning: *While HKS pin is HIGH, Both column pin and row pin are in floating state. While HKS pin is LOW, the column group stays in “HIGH” state and row group stays in “LOW” state. *The keypad is compatible with the standard dual contact matrix keyboard (as figure1b), the inexpensive single contact keyboard (as figure 1a), and electronic input (as figur e 1c). *When HKS is “LOW”, a valid key entry is defined by related Row & Column connection or by electronic input (as shown in figur e 1c). *Activation of two or more keys will result in no response, except for single key. *To avoid keyboard-bouncing error, this chip provides built-in debounce circuit. (Th e debounce time = 20ms) VDD Column Row Column Row Column VSS VDD VSS Row Figure1a: Single contact form keyboard configuration Figure1b: Dual contact form keyboard configuration Figure1c: Electronic signal input keyboard configuration (to be continued) |
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