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CY7C1353F
Document #: 38-05212 Rev. *B
Page 8 of 13
ISB3
Automatic CE Power-down
Current—CMOS Inputs
VDD = Max, Device Deselected,
VIN ≥VDDQ – 0.3V or VIN ≤ 0.3V,
f = fMAX, inputs switching
7.5-ns cycle, 133 MHz
75
mA
8.5-ns cycle, 117 MHz
70
mA
10-ns cycle, 100 MHz
65
mA
15-ns cycle, 66 MHz
45
mA
ISB4
Automatic CE Power-down
Current—TTL Inputs
VDD = Max, Device Deselected,
VIN ≥ VDD – 0.3V or VIN ≤ 0.3V, f =
0, inputs static
All speeds
45
mA
Thermal Resistance[11]
Parameters
Description
Test Conditions
TQFP Typ.
Unit
ΘJA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA / JESD51.
41.83
°C/W
ΘJC
Thermal Resistance
(Junction to Case)
9.99
°C/W
Capacitance[11]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = 3.3V
VDDQ=3.3V
5pF
CCLOCK
Clock Input Capacitance
5
pF
CI/O
I/O Capacitance
5
pF
Electrical Characteristics Over the Operating Range(continued)[9,10]
Parameter
Description
Test Conditions
Min.
Max.
Unit
AC Test Loads and Waveforms
Note:
11. Tested initially and after any design or process changes that may affect these parameters.
OUTPUT
R = 317
Ω
R = 351
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VL = 1.5V
3.3V
ALL INPUT PULSES
VDD
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
OUTPUT
R = 1667
Ω
R =1538
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VL = 1.25V
2.5V
ALL INPUT PULSES
VDD
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
3.3V I/O Test Load
2.5V I/O Test Load
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