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ISL6548CRZ-T Datasheet(PDF) 11 Page - Intersil Corporation

Part # ISL6548CRZ-T
Description  ACPI Regulator/Controller for Dual Channel DDR Memory Systems
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6548CRZ-T Datasheet(HTML) 11 Page - Intersil Corporation

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11
FN9188.1
February 9, 2005
critical because they switch large amounts of energy, and
therefore tend to generate large amounts of noise. Next are
the small signal components which connect to sensitive
nodes or supply critical bypass current and signal coupling.
A multi-layer printed circuit board is recommended. Figure 2
shows the connections of the critical components in the
converter. Note that capacitors CIN and COUT could each
represent numerous physical capacitors. Dedicate one solid
layer, usually a middle layer of the PC board, for a ground
plane and make all critical component ground connections
with vias to this layer. Dedicate another solid layer as a
power plane and break this plane into smaller islands of
common voltage levels. Keep the metal runs from the
PHASE terminals to the output inductor short. The power
plane should support the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers for the phase nodes. Use the remaining printed
circuit layers for small signal wiring. The wiring traces from
the GATE pins to the MOSFET gates should be kept short
and wide enough to easily handle the 1A of drive current.
In order to dissipate heat generated by the internal VTT
LDO, the ground pad, pin 29, should be connected to the
internal ground plane through at least four vias. This allows
the heat to move away from the IC and also ties the pad to
the ground plane through a low impedance path.
The switching components should be placed close to the
ISL6548 first. Minimize the length of the connections
between the input capacitors, CIN, and the power switches
by placing them nearby. Position both the ceramic and bulk
input capacitors as close to the upper MOSFET drain as
possible. Position the output inductor and output capacitors
between the upper and lower MOSFETs and the load.
The critical small signal components include any bypass
capacitors, feedback components, and compensation
components. Place the PWM converter compensation
components close to the FB and COMP pins. The feedback
resistors should be located as close as possible to the FB
pin with vias tied straight to the ground plane as required.
Feedback Compensation - PWM Buck Converter
Figure 3 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(VOUT) is regulated to the Reference voltage level. The error
amplifier output (VE/A) is compared with the oscillator (OSC)
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of VIN at the PHASE node. The
PWM wave is smoothed by the output filter (LO and CO).
The modulator transfer function is the small-signal transfer
function of VOUT/VE/A. This function is dominated by a DC
Gain and the output filter (LO and CO), with a double pole
break frequency at FLC and a zero at FESR. The DC Gain of
the modulator is simply the input voltage (VIN) divided by the
peak-to-peak oscillator voltage
∆VOSC.
VDDQ
5VSBY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT AND/OR POWER PLANE LAYER
L1
COUT1
CIN
5VDUAL
KEY
COMP
ISL6548
UGATE
R4
R2
CBP
FB
DRIVE3
5VSBY
FIGURE 2. PRINTED CIRCUIT BOARD POWER PLANES
AND ISLANDS
R1
VGMCH
FB3
C2
VIA CONNECTION TO GROUND PLANE
COUT4
Q1
R5
R6
PHASE
R3
C3
C1
Q2
12VATX
CBP
GNDP
P12V
Q4
LGATE
VDDQ(2)
VTT(2)
COUT2
VDDQ
VTT
GND PAD
DRIVE2_U
VTT_GMCH/CPU
FB2
COUT4
R7
R8
Q5
DRIVE4
FB4
COUT3
Q3
REFADJ4
Q6
DRIVE2_L
ISL6548


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