11

FN9189.1

July 22, 2005

diagrams on page 4). An internal 20

µA (typical) current sink

converter input voltage. When the voltage across the upper

MOSFET (also referenced to the converter input voltage)

initiates a soft-start sequence. The initiation of soft-start may

The overcurrent function will trip at a peak inductor current

typical). The OC trip point varies mainly due to the MOSFET

the equation above with:

temperature.

,

where

∆I is the output inductor ripple current.

For an equation for the ripple current see the section under

component guidelines titled ‘Output Inductor Selection’.

A small ceramic capacitor should be placed in parallel with

presence of switching noise on the input voltage.

Thermal Protection (S0/S3 State)

If the ISL6548A IC junction temperature reaches a nominal

temperature of 140°C, all regulators will be disabled. The

ISL6548A will not re-enable the outputs until the junction

temperature drops below 110°C and either the bias voltage is

toggled in order to initiate a POR or the SLP_S5 signal is

forced LOW and then back to HIGH.

Shoot-Through Protection

A shoot-through condition occurs when both the upper and

lower MOSFETs are turned on simultaneously, effectively

shorting the input voltage to ground. To protect from a shoot-

through condition, the ISL6548A incorporates specialized

complementary MOSFETs are not ON simultaneously.

regulator looks at the lower gate drive pin, LGATE, and the

upper gate drive pin, UGATE, to determine whether a

MOSFET is ON or OFF. If the voltage from UGATE or from

LGATE to GND is less than 0.8V, then the respective

MOSFET is defined as being OFF and the other MOSFET is

regulator to both source and sink current.

Since the voltage of the MOSFET gates are being measured

to determine the state of the MOSFET, the designer is

encouraged to consider the repercussions of introducing

external components between the gate drivers and their

respective MOSFET gates before actually implementing

such measures. Doing so may interfere with the shoot-

through protection.

Application Guidelines

Layout Considerations

Layout is very important in high frequency switching

converter design. With power devices switching efficiently at

250kHz, the resulting current transitions from one device to

another cause voltage spikes across the interconnecting

impedances and parasitic circuit elements. These voltage

spikes can degrade efficiency, radiate noise into the circuit,

and lead to device overvoltage stress. Careful component

layout and printed circuit board design minimizes these

voltage spikes.

As an example, consider the turn-off transition of the control

MOSFET. Prior to turn-off, the MOSFET is carrying the full

load current. During turn-off, current stops flowing in the

MOSFET and is picked up by the lower MOSFET. Any

parasitic inductance in the switched current path generates a

large voltage spike during the switching interval. Careful

component selection, tight layout of the critical components,

and short, wide traces minimizes the magnitude of voltage

spikes.

There are two sets of critical components in the ISL6548A

switching converter. The switching components are the most

critical because they switch large amounts of energy, and

therefore tend to generate large amounts of noise. Next are

the small signal components which connect to sensitive

nodes or supply critical bypass current and signal coupling.

A multi-layer printed circuit board is recommended. Figure 2

shows the connections of the critical components in the

represent numerous physical capacitors. Dedicate one solid

layer, usually a middle layer of the PC board, for a ground

plane and make all critical component ground connections

with vias to this layer. Dedicate another solid layer as a

power plane and break this plane into smaller islands of

common voltage levels. Keep the metal runs from the

PHASE terminals to the output inductor short. The power

plane should support the input power and output power

nodes. Use copper filled polygons on the top and bottom

circuit layers for the phase nodes. Use the remaining printed

circuit layers for small signal wiring. The wiring traces from

the GATE pins to the MOSFET gates should be kept short

and wide enough to easily handle the 1A of drive current.

LDO, the ground pad, pin 29, should be connected to the

internal ground plane through at least four vias. This allows

()

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=

()

∆I

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2

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+

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ISL6548A